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authorJim Grosbach <grosbach@apple.com>2011-11-14 23:03:21 +0000
committerJim Grosbach <grosbach@apple.com>2011-11-14 23:03:21 +0000
commit3e2c6f380c5700d17370a4bfa998acffeed1c32d (patch)
tree233060be861c2984ea971849474856156a3c32b4 /llvm/test/CodeGen/ARM/vdup.ll
parent0201a4c2d361efa54155c482d250bdc869bd472f (diff)
downloadbcm5719-llvm-3e2c6f380c5700d17370a4bfa998acffeed1c32d.tar.gz
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ARM VLDR/VSTR instructions don't need a size suffix.
Canonicallize on the non-suffixed form, but continue to accept assembly that has any correctly sized type suffix. llvm-svn: 144583
Diffstat (limited to 'llvm/test/CodeGen/ARM/vdup.ll')
-rw-r--r--llvm/test/CodeGen/ARM/vdup.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/ARM/vdup.ll b/llvm/test/CodeGen/ARM/vdup.ll
index e99fac1f1e6..05332e4d8c5 100644
--- a/llvm/test/CodeGen/ARM/vdup.ll
+++ b/llvm/test/CodeGen/ARM/vdup.ll
@@ -254,7 +254,7 @@ entry:
;CHECK: redundantVdup:
;CHECK: vmov.i8
;CHECK-NOT: vdup.8
-;CHECK: vstr.64
+;CHECK: vstr
define void @redundantVdup(<8 x i8>* %ptr) nounwind {
%1 = insertelement <8 x i8> undef, i8 -128, i32 0
%2 = shufflevector <8 x i8> %1, <8 x i8> undef, <8 x i32> zeroinitializer
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