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| author | Bob Wilson <bob.wilson@apple.com> | 2009-10-09 20:20:54 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2009-10-09 20:20:54 +0000 |
| commit | 35b6173a1790f65a319d5973b4fa7797044cbefd (patch) | |
| tree | bab9cd17c1443c2ff94bb476fe266965ce6e45d1 /llvm/test/CodeGen/ARM/vcls.ll | |
| parent | 1ba6edb030d9b7eaa4ef7c3ed6fd8a86b0f868ba (diff) | |
| download | bcm5719-llvm-35b6173a1790f65a319d5973b4fa7797044cbefd.tar.gz bcm5719-llvm-35b6173a1790f65a319d5973b4fa7797044cbefd.zip | |
Merge a bunch of NEON tests into larger files so they run faster.
llvm-svn: 83667
Diffstat (limited to 'llvm/test/CodeGen/ARM/vcls.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/vcls.ll | 57 |
1 files changed, 0 insertions, 57 deletions
diff --git a/llvm/test/CodeGen/ARM/vcls.ll b/llvm/test/CodeGen/ARM/vcls.ll deleted file mode 100644 index 43bd3f93a13..00000000000 --- a/llvm/test/CodeGen/ARM/vcls.ll +++ /dev/null @@ -1,57 +0,0 @@ -; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s - -define <8 x i8> @vclss8(<8 x i8>* %A) nounwind { -;CHECK: vclss8: -;CHECK: vcls.s8 - %tmp1 = load <8 x i8>* %A - %tmp2 = call <8 x i8> @llvm.arm.neon.vcls.v8i8(<8 x i8> %tmp1) - ret <8 x i8> %tmp2 -} - -define <4 x i16> @vclss16(<4 x i16>* %A) nounwind { -;CHECK: vclss16: -;CHECK: vcls.s16 - %tmp1 = load <4 x i16>* %A - %tmp2 = call <4 x i16> @llvm.arm.neon.vcls.v4i16(<4 x i16> %tmp1) - ret <4 x i16> %tmp2 -} - -define <2 x i32> @vclss32(<2 x i32>* %A) nounwind { -;CHECK: vclss32: -;CHECK: vcls.s32 - %tmp1 = load <2 x i32>* %A - %tmp2 = call <2 x i32> @llvm.arm.neon.vcls.v2i32(<2 x i32> %tmp1) - ret <2 x i32> %tmp2 -} - -define <16 x i8> @vclsQs8(<16 x i8>* %A) nounwind { -;CHECK: vclsQs8: -;CHECK: vcls.s8 - %tmp1 = load <16 x i8>* %A - %tmp2 = call <16 x i8> @llvm.arm.neon.vcls.v16i8(<16 x i8> %tmp1) - ret <16 x i8> %tmp2 -} - -define <8 x i16> @vclsQs16(<8 x i16>* %A) nounwind { -;CHECK: vclsQs16: -;CHECK: vcls.s16 - %tmp1 = load <8 x i16>* %A - %tmp2 = call <8 x i16> @llvm.arm.neon.vcls.v8i16(<8 x i16> %tmp1) - ret <8 x i16> %tmp2 -} - -define <4 x i32> @vclsQs32(<4 x i32>* %A) nounwind { -;CHECK: vclsQs32: -;CHECK: vcls.s32 - %tmp1 = load <4 x i32>* %A - %tmp2 = call <4 x i32> @llvm.arm.neon.vcls.v4i32(<4 x i32> %tmp1) - ret <4 x i32> %tmp2 -} - -declare <8 x i8> @llvm.arm.neon.vcls.v8i8(<8 x i8>) nounwind readnone -declare <4 x i16> @llvm.arm.neon.vcls.v4i16(<4 x i16>) nounwind readnone -declare <2 x i32> @llvm.arm.neon.vcls.v2i32(<2 x i32>) nounwind readnone - -declare <16 x i8> @llvm.arm.neon.vcls.v16i8(<16 x i8>) nounwind readnone -declare <8 x i16> @llvm.arm.neon.vcls.v8i16(<8 x i16>) nounwind readnone -declare <4 x i32> @llvm.arm.neon.vcls.v4i32(<4 x i32>) nounwind readnone |

