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authorOwen Anderson <resistor@mac.com>2010-11-08 23:21:22 +0000
committerOwen Anderson <resistor@mac.com>2010-11-08 23:21:22 +0000
commitc7baee31adebb87db3cb7fead407ace32c562d0b (patch)
tree57143533b9393ea8b9e01c50ced2417d1fa54bc1 /llvm/test/CodeGen/ARM/vcge.ll
parent94ad274c249527f82387413ad0876e7571bbf926 (diff)
downloadbcm5719-llvm-c7baee31adebb87db3cb7fead407ace32c562d0b.tar.gz
bcm5719-llvm-c7baee31adebb87db3cb7fead407ace32c562d0b.zip
Add support for ARM's specialized vector-compare-against-zero instructions.
llvm-svn: 118453
Diffstat (limited to 'llvm/test/CodeGen/ARM/vcge.ll')
-rw-r--r--llvm/test/CodeGen/ARM/vcge.ll22
1 files changed, 22 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/ARM/vcge.ll b/llvm/test/CodeGen/ARM/vcge.ll
index 2c161113c11..f190931f1bf 100644
--- a/llvm/test/CodeGen/ARM/vcge.ll
+++ b/llvm/test/CodeGen/ARM/vcge.ll
@@ -160,3 +160,25 @@ define <4 x i32> @vacgeQf32(<4 x float>* %A, <4 x float>* %B) nounwind {
declare <2 x i32> @llvm.arm.neon.vacged(<2 x float>, <2 x float>) nounwind readnone
declare <4 x i32> @llvm.arm.neon.vacgeq(<4 x float>, <4 x float>) nounwind readnone
+
+define <8 x i8> @vcgei8Z(<8 x i8>* %A) nounwind {
+;CHECK: vcgei8Z:
+;CHECK-NOT: vmov
+;CHECK-NOT: vmvn
+;CHECK: vcge.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp3 = icmp sge <8 x i8> %tmp1, <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>
+ %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
+ ret <8 x i8> %tmp4
+}
+
+define <8 x i8> @vclei8Z(<8 x i8>* %A) nounwind {
+;CHECK: vclei8Z:
+;CHECK-NOT: vmov
+;CHECK-NOT: vmvn
+;CHECK: vcle.s8
+ %tmp1 = load <8 x i8>* %A
+ %tmp3 = icmp sle <8 x i8> %tmp1, <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>
+ %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
+ ret <8 x i8> %tmp4
+}
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