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| author | Sanjay Patel <spatel@rotateright.com> | 2017-04-19 21:23:09 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2017-04-19 21:23:09 +0000 |
| commit | ae382bb6af2c8ac70d0c24ee32418f0980d7f2c8 (patch) | |
| tree | 770daacf8a282c27f3442381da5561d469213c43 /llvm/test/CodeGen/ARM/vbits.ll | |
| parent | ada0888a111750ff4caec49208d11de4e29bfb61 (diff) | |
| download | bcm5719-llvm-ae382bb6af2c8ac70d0c24ee32418f0980d7f2c8.tar.gz bcm5719-llvm-ae382bb6af2c8ac70d0c24ee32418f0980d7f2c8.zip | |
[DAG] add splat vector support for 'xor' in SimplifyDemandedBits
This allows forming more 'not' ops, so we get improvements for ISAs that have and-not.
Follow-up to:
https://reviews.llvm.org/rL300725
llvm-svn: 300763
Diffstat (limited to 'llvm/test/CodeGen/ARM/vbits.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/vbits.ll | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/ARM/vbits.ll b/llvm/test/CodeGen/ARM/vbits.ll index 040904b7e9c..0a7f7698fa8 100644 --- a/llvm/test/CodeGen/ARM/vbits.ll +++ b/llvm/test/CodeGen/ARM/vbits.ll @@ -850,11 +850,9 @@ define <4 x i32> @hidden_not_v4i32(<4 x i32> %x) nounwind { ; CHECK-LABEL: hidden_not_v4i32: ; CHECK: @ BB#0: ; CHECK-NEXT: vmov d19, r2, r3 -; CHECK-NEXT: vmov.i32 q8, #0xf +; CHECK-NEXT: vmov.i32 q8, #0x6 ; CHECK-NEXT: vmov d18, r0, r1 -; CHECK-NEXT: vmov.i32 q10, #0x6 -; CHECK-NEXT: veor q8, q9, q8 -; CHECK-NEXT: vand q8, q8, q10 +; CHECK-NEXT: vbic q8, q8, q9 ; CHECK-NEXT: vmov r0, r1, d16 ; CHECK-NEXT: vmov r2, r3, d17 ; CHECK-NEXT: bx lr |
