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| author | Eli Friedman <efriedma@codeaurora.org> | 2017-04-07 22:01:23 +0000 |
|---|---|---|
| committer | Eli Friedman <efriedma@codeaurora.org> | 2017-04-07 22:01:23 +0000 |
| commit | 75631c97ba0c195c9ba7eb6fb6effca6b68ea14a (patch) | |
| tree | 20d7af9a4e7d7c3971ecd605f9692b5a63517d4f /llvm/test/CodeGen/ARM/va_arg.ll | |
| parent | eb80a51b52b669e63778dbdca1f25ed34c5a8149 (diff) | |
| download | bcm5719-llvm-75631c97ba0c195c9ba7eb6fb6effca6b68ea14a.tar.gz bcm5719-llvm-75631c97ba0c195c9ba7eb6fb6effca6b68ea14a.zip | |
[ARM] Prefer BIC over BFC in ARM mode.
BIC is generally faster, and it can put the output in a different
register from the input.
We already do this in Thumb2 mode; not sure why the equivalent fix
never got applied to ARM mode.
Differential Revision: https://reviews.llvm.org/D31797
llvm-svn: 299803
Diffstat (limited to 'llvm/test/CodeGen/ARM/va_arg.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/va_arg.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/ARM/va_arg.ll b/llvm/test/CodeGen/ARM/va_arg.ll index d901a7461fc..57470694b12 100644 --- a/llvm/test/CodeGen/ARM/va_arg.ll +++ b/llvm/test/CodeGen/ARM/va_arg.ll @@ -4,8 +4,8 @@ ; CHECK-LABEL: test1: ; CHECK-NOT: bfc ; CHECK: add [[REG:(r[0-9]+)|(lr)]], {{(r[0-9]+)|(lr)}}, #7 -; CHECK: bfc [[REG]], #0, #3 -; CHECK-NOT: bfc +; CHECK: bic {{(r[0-9]+)|(lr)}}, [[REG]], #7 +; CHECK-NOT: bic define i64 @test1(i32 %i, ...) nounwind optsize { entry: @@ -20,8 +20,8 @@ entry: ; CHECK-LABEL: test2: ; CHECK-NOT: bfc ; CHECK: add [[REG:(r[0-9]+)|(lr)]], {{(r[0-9]+)|(lr)}}, #7 -; CHECK: bfc [[REG]], #0, #3 -; CHECK-NOT: bfc +; CHECK: bic {{(r[0-9]+)|(lr)}}, [[REG]], #7 +; CHECK-NOT: bic ; CHECK: bx lr define double @test2(i32 %a, i32* %b, ...) nounwind optsize { |
