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authorEvan Cheng <evan.cheng@apple.com>2007-01-19 09:20:23 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-01-19 09:20:23 +0000
commita5007faaa68de9487fe63b690bea6e16c3c5f770 (patch)
tree07322d3e08789b6620893863778d9927e5cf80ce /llvm/test/CodeGen/ARM/uxtb.ll
parent10043e215bcfd6d2b09a6ce3ad461fd686f686b8 (diff)
downloadbcm5719-llvm-a5007faaa68de9487fe63b690bea6e16c3c5f770.tar.gz
bcm5719-llvm-a5007faaa68de9487fe63b690bea6e16c3c5f770.zip
ARM test cases contributed by Apple.
llvm-svn: 33354
Diffstat (limited to 'llvm/test/CodeGen/ARM/uxtb.ll')
-rw-r--r--llvm/test/CodeGen/ARM/uxtb.ll75
1 files changed, 75 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/ARM/uxtb.ll b/llvm/test/CodeGen/ARM/uxtb.ll
new file mode 100644
index 00000000000..fcd0a23fe7c
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/uxtb.ll
@@ -0,0 +1,75 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm &&
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 | grep uxt | wc -l | grep 10
+
+uint %test1(uint %x) {
+ %tmp1 = and uint %x, 16711935 ; <uint> [#uses=1]
+ ret uint %tmp1
+}
+
+uint %test2(uint %x) {
+ %tmp1 = shr uint %x, ubyte 8 ; <uint> [#uses=1]
+ %tmp2 = and uint %tmp1, 16711935 ; <uint> [#uses=1]
+ ret uint %tmp2
+}
+
+uint %test3(uint %x) {
+ %tmp1 = shr uint %x, ubyte 8 ; <uint> [#uses=1]
+ %tmp2 = and uint %tmp1, 16711935 ; <uint> [#uses=1]
+ ret uint %tmp2
+}
+
+uint %test4(uint %x) {
+ %tmp1 = shr uint %x, ubyte 8 ; <uint> [#uses=1]
+ %tmp6 = and uint %tmp1, 16711935 ; <uint> [#uses=1]
+ ret uint %tmp6
+}
+
+uint %test5(uint %x) {
+ %tmp1 = shr uint %x, ubyte 8 ; <uint> [#uses=1]
+ %tmp2 = and uint %tmp1, 16711935 ; <uint> [#uses=1]
+ ret uint %tmp2
+}
+
+uint %test6(uint %x) {
+ %tmp1 = shr uint %x, ubyte 16 ; <uint> [#uses=1]
+ %tmp2 = and uint %tmp1, 255 ; <uint> [#uses=1]
+ %tmp4 = shl uint %x, ubyte 16 ; <uint> [#uses=1]
+ %tmp5 = and uint %tmp4, 16711680 ; <uint> [#uses=1]
+ %tmp6 = or uint %tmp2, %tmp5 ; <uint> [#uses=1]
+ ret uint %tmp6
+}
+
+uint %test7(uint %x) {
+ %tmp1 = shr uint %x, ubyte 16 ; <uint> [#uses=1]
+ %tmp2 = and uint %tmp1, 255 ; <uint> [#uses=1]
+ %tmp4 = shl uint %x, ubyte 16 ; <uint> [#uses=1]
+ %tmp5 = and uint %tmp4, 16711680 ; <uint> [#uses=1]
+ %tmp6 = or uint %tmp2, %tmp5 ; <uint> [#uses=1]
+ ret uint %tmp6
+}
+
+uint %test8(uint %x) {
+ %tmp1 = shl uint %x, ubyte 8 ; <uint> [#uses=1]
+ %tmp2 = and uint %tmp1, 16711680 ; <uint> [#uses=1]
+ %tmp5 = shr uint %x, ubyte 24 ; <uint> [#uses=1]
+ %tmp6 = or uint %tmp2, %tmp5 ; <uint> [#uses=1]
+ ret uint %tmp6
+}
+
+uint %test9(uint %x) {
+ %tmp1 = shr uint %x, ubyte 24 ; <uint> [#uses=1]
+ %tmp4 = shl uint %x, ubyte 8 ; <uint> [#uses=1]
+ %tmp5 = and uint %tmp4, 16711680 ; <uint> [#uses=1]
+ %tmp6 = or uint %tmp5, %tmp1 ; <uint> [#uses=1]
+ ret uint %tmp6
+}
+
+uint %test10(uint %p0) {
+ %tmp1 = shr uint %p0, ubyte 7 ; <uint> [#uses=1]
+ %tmp2 = and uint %tmp1, 16253176 ; <uint> [#uses=2]
+ %tmp4 = shr uint %tmp2, ubyte 5 ; <uint> [#uses=1]
+ %tmp5 = and uint %tmp4, 458759 ; <uint> [#uses=1]
+ %tmp7 = or uint %tmp5, %tmp2 ; <uint> [#uses=1]
+ ret uint %tmp7
+}
+
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