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| author | Bob Wilson <bob.wilson@apple.com> | 2012-09-29 21:43:49 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2012-09-29 21:43:49 +0000 |
| commit | e8a549cd92719d14845beb5aac8fc50fe2cd21db (patch) | |
| tree | 4fb3d1d3fb2cc62abce6b41fbbb65271f535ea34 /llvm/test/CodeGen/ARM/subreg-remat.ll | |
| parent | 63605ef378851849b8ca967477e8b209284af481 (diff) | |
| download | bcm5719-llvm-e8a549cd92719d14845beb5aac8fc50fe2cd21db.tar.gz bcm5719-llvm-e8a549cd92719d14845beb5aac8fc50fe2cd21db.zip | |
Add LLVM support for Swift.
llvm-svn: 164899
Diffstat (limited to 'llvm/test/CodeGen/ARM/subreg-remat.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/subreg-remat.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/ARM/subreg-remat.ll b/llvm/test/CodeGen/ARM/subreg-remat.ll index 03ae12c6dea..455bfce0f2e 100644 --- a/llvm/test/CodeGen/ARM/subreg-remat.ll +++ b/llvm/test/CodeGen/ARM/subreg-remat.ll @@ -4,14 +4,14 @@ target triple = "thumbv7-apple-ios" ; ; The vector %v2 is built like this: ; -; %vreg6:ssub_1<def> = VMOVSR %vreg0<kill>, pred:14, pred:%noreg, %vreg6<imp-def>; DPR_VFP2:%vreg6 GPR:%vreg0 +; %vreg6:ssub_1<def> = ... ; %vreg6:ssub_0<def> = VLDRS <cp#0>, 0, pred:14, pred:%noreg; mem:LD4[ConstantPool] DPR_VFP2:%vreg6 ; ; When %vreg6 spills, the VLDRS constant pool load cannot be rematerialized ; since it implicitly reads the ssub_1 sub-register. ; ; CHECK: f1 -; CHECK: vmov s1, r0 +; CHECK: vmov d0, r0, r0 ; CHECK: vldr s0, LCPI ; The vector must be spilled: ; CHECK: vstr d0, |
