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| author | Owen Anderson <resistor@mac.com> | 2011-04-06 23:35:59 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-04-06 23:35:59 +0000 |
| commit | bdff1c997aab5458ca4c23029143fad3f036dc1b (patch) | |
| tree | 0d4507b7a76c23a9db998b1b95afb66e1a901d92 /llvm/test/CodeGen/ARM/sub.ll | |
| parent | c1bcafd8c1ffc6ec1421f7c6debc125f24d8b9ce (diff) | |
| download | bcm5719-llvm-bdff1c997aab5458ca4c23029143fad3f036dc1b.tar.gz bcm5719-llvm-bdff1c997aab5458ca4c23029143fad3f036dc1b.zip | |
Teach the ARM peephole optimizer that RSB, RSC, ADC, and SBC can be used for folded comparisons, just like ADD and SUB.
llvm-svn: 129038
Diffstat (limited to 'llvm/test/CodeGen/ARM/sub.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/sub.ll | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/ARM/sub.ll b/llvm/test/CodeGen/ARM/sub.ll index 7ada14d0ff9..555b18eb1e9 100644 --- a/llvm/test/CodeGen/ARM/sub.ll +++ b/llvm/test/CodeGen/ARM/sub.ll @@ -27,3 +27,12 @@ define i64 @f3(i64 %a) { ret i64 %tmp } +define i32 @f4(i32 %x) { +entry: +; CHECK: f4 +; CHECK: rsbs + %sub = sub i32 1, %x + %cmp = icmp ugt i32 %sub, 0 + %sel = select i1 %cmp, i32 1, i32 %sub + ret i32 %sel +} |
