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author | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2017-11-30 12:12:19 +0000 |
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committer | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2017-11-30 12:12:19 +0000 |
commit | 93ef145862e140ed880fd2eca404dc2641a12093 (patch) | |
tree | 6e29f9874fc995008ef8e53a6375b06de67d33e6 /llvm/test/CodeGen/ARM/stack-alignment.ll | |
parent | bfb8fa5a160a943d9cf8d7254cf4375f2c135f2d (diff) | |
download | bcm5719-llvm-93ef145862e140ed880fd2eca404dc2641a12093.tar.gz bcm5719-llvm-93ef145862e140ed880fd2eca404dc2641a12093.zip |
[CodeGen] Print "%vreg0" as "%0" in both MIR and debug output
As part of the unification of the debug format and the MIR format, avoid
printing "vreg" for virtual registers (which is one of the current MIR
possibilities).
Basically:
* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E "s/%vreg([0-9]+)/%\1/g"
* grep -nr '%vreg' . and fix if needed
* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E "s/ vreg([0-9]+)/ %\1/g"
* grep -nr 'vreg[0-9]\+' . and fix if needed
Differential Revision: https://reviews.llvm.org/D40420
llvm-svn: 319427
Diffstat (limited to 'llvm/test/CodeGen/ARM/stack-alignment.ll')
0 files changed, 0 insertions, 0 deletions