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author | Evan Cheng <evan.cheng@apple.com> | 2011-06-17 20:47:21 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2011-06-17 20:47:21 +0000 |
commit | 7552a62af586404bfdb96d9202e15ef22ea0844e (patch) | |
tree | 258d6c815950d42e2da055b96180599b07077380 /llvm/test/CodeGen/ARM/rev.ll | |
parent | 5bbb2bdb46522dc6f8b24c7cceafffcd7f719dd0 (diff) | |
download | bcm5719-llvm-7552a62af586404bfdb96d9202e15ef22ea0844e.tar.gz bcm5719-llvm-7552a62af586404bfdb96d9202e15ef22ea0844e.zip |
Add an alternative rev16 pattern. We should figure out a better way to handle these complex rev patterns. rdar://9609108
llvm-svn: 133289
Diffstat (limited to 'llvm/test/CodeGen/ARM/rev.ll')
-rw-r--r-- | llvm/test/CodeGen/ARM/rev.ll | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/ARM/rev.ll b/llvm/test/CodeGen/ARM/rev.ll index 5739086267e..c210a55b66f 100644 --- a/llvm/test/CodeGen/ARM/rev.ll +++ b/llvm/test/CodeGen/ARM/rev.ll @@ -67,3 +67,20 @@ entry: %or = or i32 %shr, %and ret i32 %or } + +; rdar://9609108 +define i32 @test6(i32 %x) nounwind readnone { +entry: +; CHECK: test6 +; CHECK: rev16 r0, r0 + %and = shl i32 %x, 8 + %shl = and i32 %and, 65280 + %and2 = lshr i32 %x, 8 + %shr11 = and i32 %and2, 255 + %shr5 = and i32 %and2, 16711680 + %shl9 = and i32 %and, -16777216 + %or = or i32 %shr5, %shl9 + %or6 = or i32 %or, %shr11 + %or10 = or i32 %or6, %shl + ret i32 %or10 +} |