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authorBob Wilson <bob.wilson@apple.com>2010-07-09 00:47:20 +0000
committerBob Wilson <bob.wilson@apple.com>2010-07-09 00:47:20 +0000
commit88a4e6dc0e307e57c18d63c592fcc40865f04e9d (patch)
tree10c2437603fcbbc5264332f9035c3d79b4b79254 /llvm/test/CodeGen/ARM/reg_sequence.ll
parent0b5aa1cdd3946745b54bb33902db391d41e53cd8 (diff)
downloadbcm5719-llvm-88a4e6dc0e307e57c18d63c592fcc40865f04e9d.tar.gz
bcm5719-llvm-88a4e6dc0e307e57c18d63c592fcc40865f04e9d.zip
Print "dregpair" NEON operands with a space between them, for readability and
consistency with other instructions that have lists of register operands. llvm-svn: 107944
Diffstat (limited to 'llvm/test/CodeGen/ARM/reg_sequence.ll')
-rw-r--r--llvm/test/CodeGen/ARM/reg_sequence.ll4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/ARM/reg_sequence.ll b/llvm/test/CodeGen/ARM/reg_sequence.ll
index 1c4552a4884..9e365c94211 100644
--- a/llvm/test/CodeGen/ARM/reg_sequence.ll
+++ b/llvm/test/CodeGen/ARM/reg_sequence.ll
@@ -240,8 +240,8 @@ define arm_aapcs_vfpcc float @t9(%0* nocapture, %3* nocapture) nounwind {
; CHECK: vldr.64
; CHECK-NOT: vmov d{{.*}}, d0
; CHECK: vmov.i8 d1
-; CHECK-NEXT: vstmia r0, {d0,d1}
-; CHECK-NEXT: vstmia r0, {d0,d1}
+; CHECK-NEXT: vstmia r0, {d0, d1}
+; CHECK-NEXT: vstmia r0, {d0, d1}
%3 = bitcast double 0.000000e+00 to <2 x float> ; <<2 x float>> [#uses=2]
%4 = shufflevector <2 x float> %3, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> ; <<4 x float>> [#uses=1]
store <4 x float> %4, <4 x float>* undef, align 16
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