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author | Rafael Espindola <rafael.espindola@gmail.com> | 2010-06-17 15:18:27 +0000 |
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committer | Rafael Espindola <rafael.espindola@gmail.com> | 2010-06-17 15:18:27 +0000 |
commit | 29dda21e9691839f7a877ed6028b6b33a84c0ca3 (patch) | |
tree | 67103a830e068ffa52b416ce89fce95e8646afa4 /llvm/test/CodeGen/ARM/reg_sequence.ll | |
parent | 055229185957d371d27e571d66c2a401a805813a (diff) | |
download | bcm5719-llvm-29dda21e9691839f7a877ed6028b6b33a84c0ca3.tar.gz bcm5719-llvm-29dda21e9691839f7a877ed6028b6b33a84c0ca3.zip |
Remove arm_apcscc from the test files. It is the default and doing this
matches what llvm-gcc and clang now produce.
llvm-svn: 106221
Diffstat (limited to 'llvm/test/CodeGen/ARM/reg_sequence.ll')
-rw-r--r-- | llvm/test/CodeGen/ARM/reg_sequence.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/ARM/reg_sequence.ll b/llvm/test/CodeGen/ARM/reg_sequence.ll index 8199d4664ff..79ed84f0dff 100644 --- a/llvm/test/CodeGen/ARM/reg_sequence.ll +++ b/llvm/test/CodeGen/ARM/reg_sequence.ll @@ -8,7 +8,7 @@ %struct.__neon_int16x8x2_t = type { <8 x i16>, <8 x i16> } %struct.__neon_int32x4x2_t = type { <4 x i32>, <4 x i32> } -define arm_apcscc void @t1(i16* %i_ptr, i16* %o_ptr, %struct.int32x4_t* nocapture %vT0ptr, %struct.int32x4_t* nocapture %vT1ptr) nounwind { +define void @t1(i16* %i_ptr, i16* %o_ptr, %struct.int32x4_t* nocapture %vT0ptr, %struct.int32x4_t* nocapture %vT1ptr) nounwind { entry: ; CHECK: t1: ; CHECK: vld1.16 @@ -41,7 +41,7 @@ entry: ret void } -define arm_apcscc void @t2(i16* %i_ptr, i16* %o_ptr, %struct.int16x8_t* nocapture %vT0ptr, %struct.int16x8_t* nocapture %vT1ptr) nounwind { +define void @t2(i16* %i_ptr, i16* %o_ptr, %struct.int16x8_t* nocapture %vT0ptr, %struct.int16x8_t* nocapture %vT1ptr) nounwind { entry: ; CHECK: t2: ; CHECK: vld1.16 @@ -88,7 +88,7 @@ define <8 x i8> @t3(i8* %A, i8* %B) nounwind { ret <8 x i8> %tmp4 } -define arm_apcscc void @t4(i32* %in, i32* %out) nounwind { +define void @t4(i32* %in, i32* %out) nounwind { entry: ; CHECK: t4: ; CHECK: vld2.32 @@ -163,7 +163,7 @@ define <8 x i8> @t6(i8* %A, <8 x i8>* %B) nounwind { ret <8 x i8> %tmp5 } -define arm_apcscc void @t7(i32* %iptr, i32* %optr) nounwind { +define void @t7(i32* %iptr, i32* %optr) nounwind { entry: ; CHECK: t7: ; CHECK: vld2.32 |