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| author | Evan Cheng <evan.cheng@apple.com> | 2010-10-09 01:03:04 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-10-09 01:03:04 +0000 |
| commit | 05f13e94bf080d3e3beb93352d8fc70258d7a56c (patch) | |
| tree | d5a7aec1345bbdcf0ae31e06825ef4e625632013 /llvm/test/CodeGen/ARM/reg_sequence.ll | |
| parent | b7c046248cb140d42772c72c249b29d3267d9e14 (diff) | |
| download | bcm5719-llvm-05f13e94bf080d3e3beb93352d8fc70258d7a56c.tar.gz bcm5719-llvm-05f13e94bf080d3e3beb93352d8fc70258d7a56c.zip | |
Correct some load / store instruction itinerary mistakes:
1. Cortex-A8 load / store multiplies can only issue on ALU0.
2. Eliminate A8_Issue, A8_LSPipe will correctly limit the load / store issues.
3. Correctly model all vld1 and vld2 variants.
llvm-svn: 116134
Diffstat (limited to 'llvm/test/CodeGen/ARM/reg_sequence.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/reg_sequence.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/ARM/reg_sequence.ll b/llvm/test/CodeGen/ARM/reg_sequence.ll index b96762abe3d..1a95897c26c 100644 --- a/llvm/test/CodeGen/ARM/reg_sequence.ll +++ b/llvm/test/CodeGen/ARM/reg_sequence.ll @@ -46,8 +46,8 @@ entry: ; CHECK: t2: ; CHECK: vld1.16 ; CHECK-NOT: vmov -; CHECK: vld1.16 ; CHECK: vmul.i16 +; CHECK: vld1.16 ; CHECK: vmul.i16 ; CHECK-NOT: vmov ; CHECK: vst1.16 |
