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authorBruno Cardoso Lopes <bruno.cardoso@gmail.com>2011-06-14 04:58:37 +0000
committerBruno Cardoso Lopes <bruno.cardoso@gmail.com>2011-06-14 04:58:37 +0000
commitdc9ff3a4b1116c6d2e47a88e360f1d21ad2d1d43 (patch)
tree27cc4fe0866e6a37d1e00f9c1213c2392c8a3d66 /llvm/test/CodeGen/ARM/prefetch.ll
parentee7286f02dcf6711a84f3e6908a6d1a6727d90da (diff)
downloadbcm5719-llvm-dc9ff3a4b1116c6d2e47a88e360f1d21ad2d1d43.tar.gz
bcm5719-llvm-dc9ff3a4b1116c6d2e47a88e360f1d21ad2d1d43.zip
Add one more argument to the prefetch intrinsic to indicate whether it's a data
or instruction cache access. Update the targets to match it and also teach autoupgrade. llvm-svn: 132976
Diffstat (limited to 'llvm/test/CodeGen/ARM/prefetch.ll')
-rw-r--r--llvm/test/CodeGen/ARM/prefetch.ll12
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/ARM/prefetch.ll b/llvm/test/CodeGen/ARM/prefetch.ll
index 95f082aa938..03a6947699a 100644
--- a/llvm/test/CodeGen/ARM/prefetch.ll
+++ b/llvm/test/CodeGen/ARM/prefetch.ll
@@ -17,8 +17,8 @@ entry:
; THUMB2: t1:
; THUMB2-NOT: pldw [r0]
; THUMB2: pld [r0]
- tail call void @llvm.prefetch( i8* %ptr, i32 1, i32 3 )
- tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3 )
+ tail call void @llvm.prefetch( i8* %ptr, i32 1, i32 3, i32 1 )
+ tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3, i32 1 )
ret void
}
@@ -30,7 +30,7 @@ entry:
; THUMB2: t2:
; THUMB2: pld [r0, #1023]
%tmp = getelementptr i8* %ptr, i32 1023
- tail call void @llvm.prefetch( i8* %tmp, i32 0, i32 3 )
+ tail call void @llvm.prefetch( i8* %tmp, i32 0, i32 3, i32 1 )
ret void
}
@@ -45,7 +45,7 @@ entry:
%tmp1 = lshr i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i8*
- tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3 )
+ tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3, i32 1 )
ret void
}
@@ -59,8 +59,8 @@ entry:
%tmp1 = shl i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i8*
- tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3 )
+ tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3, i32 1 )
ret void
}
-declare void @llvm.prefetch(i8*, i32, i32) nounwind
+declare void @llvm.prefetch(i8*, i32, i32, i32) nounwind
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