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authorEvan Cheng <evan.cheng@apple.com>2009-07-21 00:31:12 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-07-21 00:31:12 +0000
commit0d8b0cf3b850d1f627e16bbf890ec43df1021ed9 (patch)
tree5ec65b95f60736f63c33a923437764a346bec742 /llvm/test/CodeGen/ARM/mul_const.ll
parent9a47392f2e556cc514d198d1406f6bf983e8a200 (diff)
downloadbcm5719-llvm-0d8b0cf3b850d1f627e16bbf890ec43df1021ed9.tar.gz
bcm5719-llvm-0d8b0cf3b850d1f627e16bbf890ec43df1021ed9.zip
Fix ARM isle code that optimize multiply by constants which are power-of-2 +/- 1.
llvm-svn: 76520
Diffstat (limited to 'llvm/test/CodeGen/ARM/mul_const.ll')
-rw-r--r--llvm/test/CodeGen/ARM/mul_const.ll17
1 files changed, 17 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/ARM/mul_const.ll b/llvm/test/CodeGen/ARM/mul_const.ll
new file mode 100644
index 00000000000..f5ace1852a4
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/mul_const.ll
@@ -0,0 +1,17 @@
+; RUN: llvm-as < %s | llc -march=arm | FileCheck %s
+
+define i32 @t1(i32 %v) nounwind readnone {
+entry:
+; CHECK: t1:
+; CHECK: add r0, r0, r0, lsl #3
+ %0 = mul i32 %v, 9
+ ret i32 %0
+}
+
+define i32 @t2(i32 %v) nounwind readnone {
+entry:
+; CHECK: t2:
+; CHECK: rsb r0, r0, r0, lsl #3
+ %0 = mul i32 %v, 7
+ ret i32 %0
+}
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