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authorJim Grosbach <grosbach@apple.com>2010-10-14 20:43:44 +0000
committerJim Grosbach <grosbach@apple.com>2010-10-14 20:43:44 +0000
commit062749cb25c7e69dac4733247ebd9c2e3ca0e60e (patch)
treedad874ac0ebfe6bd0e28f40ce1878238f7341819 /llvm/test/CodeGen/ARM/long_shift.ll
parent0afa7f66cd98b93990f52fe93938a44e29cba310 (diff)
downloadbcm5719-llvm-062749cb25c7e69dac4733247ebd9c2e3ca0e60e.tar.gz
bcm5719-llvm-062749cb25c7e69dac4733247ebd9c2e3ca0e60e.zip
Tweak the ARM backend to use the RRX mnemonic instead of the 'mov a, b, rrx'
pseudonym. llvm-svn: 116512
Diffstat (limited to 'llvm/test/CodeGen/ARM/long_shift.ll')
-rw-r--r--llvm/test/CodeGen/ARM/long_shift.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/ARM/long_shift.ll b/llvm/test/CodeGen/ARM/long_shift.ll
index 43d58ecbd4a..4d2243a2aa3 100644
--- a/llvm/test/CodeGen/ARM/long_shift.ll
+++ b/llvm/test/CodeGen/ARM/long_shift.ll
@@ -3,7 +3,7 @@
define i64 @f0(i64 %A, i64 %B) {
; CHECK: f0
; CHECK: movs r3, r3, lsr #1
-; CHECK-NEXT: mov r2, r2, rrx
+; CHECK-NEXT: rrx r2, r2
; CHECK-NEXT: subs r0, r0, r2
; CHECK-NEXT: sbc r1, r1, r3
%tmp = bitcast i64 %A to i64
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