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author | Bob Wilson <bob.wilson@apple.com> | 2009-10-27 06:16:45 +0000 |
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committer | Bob Wilson <bob.wilson@apple.com> | 2009-10-27 06:16:45 +0000 |
commit | d169e6c28115e1e61b61cd656b3bf8b44c8531de (patch) | |
tree | 20aa5b4274f132b31c1d424905130fc5cc4fff49 /llvm/test/CodeGen/ARM/long.ll | |
parent | 04580c8307c309390abf488c85ea21825b928bbd (diff) | |
download | bcm5719-llvm-d169e6c28115e1e61b61cd656b3bf8b44c8531de.tar.gz bcm5719-llvm-d169e6c28115e1e61b61cd656b3bf8b44c8531de.zip |
Fix the rest of the ARM failures by converting them to FileCheck.
llvm-svn: 85208
Diffstat (limited to 'llvm/test/CodeGen/ARM/long.ll')
-rw-r--r-- | llvm/test/CodeGen/ARM/long.ll | 34 |
1 files changed, 22 insertions, 12 deletions
diff --git a/llvm/test/CodeGen/ARM/long.ll b/llvm/test/CodeGen/ARM/long.ll index 2fcaac0d9c9..16ef7cc2cb6 100644 --- a/llvm/test/CodeGen/ARM/long.ll +++ b/llvm/test/CodeGen/ARM/long.ll @@ -1,47 +1,50 @@ -; RUN: llc < %s -march=arm -asm-verbose | \ -; RUN: grep -- {-2147483648} | count 3 -; RUN: llc < %s -march=arm | grep mvn | count 3 -; RUN: llc < %s -march=arm | grep adds | count 1 -; RUN: llc < %s -march=arm | grep adc | count 1 -; RUN: llc < %s -march=arm | grep {subs } | count 1 -; RUN: llc < %s -march=arm | grep sbc | count 1 -; RUN: llc < %s -march=arm | \ -; RUN: grep smull | count 1 -; RUN: llc < %s -march=arm | \ -; RUN: grep umull | count 1 +; RUN: llc < %s -march=arm | FileCheck %s define i64 @f1() { +; CHECK: f1: entry: ret i64 0 } define i64 @f2() { +; CHECK: f2: entry: ret i64 1 } define i64 @f3() { +; CHECK: f3: +; CHECK: mvn{{.*}}-2147483648 entry: ret i64 2147483647 } define i64 @f4() { +; CHECK: f4: +; CHECK: -2147483648 entry: ret i64 2147483648 } define i64 @f5() { +; CHECK: f5: +; CHECK: mvn +; CHECK: mvn{{.*}}-2147483648 entry: ret i64 9223372036854775807 } define i64 @f6(i64 %x, i64 %y) { +; CHECK: f6: +; CHECK: adds +; CHECK: adc entry: %tmp1 = add i64 %y, 1 ; <i64> [#uses=1] ret i64 %tmp1 } define void @f7() { +; CHECK: f7: entry: %tmp = call i64 @f8( ) ; <i64> [#uses=0] ret void @@ -50,12 +53,17 @@ entry: declare i64 @f8() define i64 @f9(i64 %a, i64 %b) { +; CHECK: f9: +; CHECK: subs r +; CHECK: sbc entry: %tmp = sub i64 %a, %b ; <i64> [#uses=1] ret i64 %tmp } define i64 @f(i32 %a, i32 %b) { +; CHECK: f: +; CHECK: smull entry: %tmp = sext i32 %a to i64 ; <i64> [#uses=1] %tmp1 = sext i32 %b to i64 ; <i64> [#uses=1] @@ -64,6 +72,8 @@ entry: } define i64 @g(i32 %a, i32 %b) { +; CHECK: g: +; CHECK: umull entry: %tmp = zext i32 %a to i64 ; <i64> [#uses=1] %tmp1 = zext i32 %b to i64 ; <i64> [#uses=1] @@ -72,9 +82,9 @@ entry: } define i64 @f10() { +; CHECK: f10: entry: %a = alloca i64, align 8 ; <i64*> [#uses=1] %retval = load i64* %a ; <i64> [#uses=1] ret i64 %retval } - |