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| author | Artur Pilipenko <apilipenko@azulsystems.com> | 2017-02-16 13:04:46 +0000 |
|---|---|---|
| committer | Artur Pilipenko <apilipenko@azulsystems.com> | 2017-02-16 13:04:46 +0000 |
| commit | a1b384c4ceffb1e3d5a08bb2ce1222eebf7bf8b3 (patch) | |
| tree | 6d884299c1e6637fed68ca8b7aaae5d30a2a053d /llvm/test/CodeGen/ARM/load-combine-big-endian.ll | |
| parent | daaa0c0f7d405b4ebd515dc50aa0d0ebe4ee75ff (diff) | |
| download | bcm5719-llvm-a1b384c4ceffb1e3d5a08bb2ce1222eebf7bf8b3.tar.gz bcm5719-llvm-a1b384c4ceffb1e3d5a08bb2ce1222eebf7bf8b3.zip | |
Rever -r295314 "[DAGCombiner] Support {a|s}ext, {a|z|s}ext load nodes in load combine"
This change causes some of AMDGPU and PowerPC tests to fail.
llvm-svn: 295316
Diffstat (limited to 'llvm/test/CodeGen/ARM/load-combine-big-endian.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/load-combine-big-endian.ll | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/ARM/load-combine-big-endian.ll b/llvm/test/CodeGen/ARM/load-combine-big-endian.ll index c88cdb73077..047c732183e 100644 --- a/llvm/test/CodeGen/ARM/load-combine-big-endian.ll +++ b/llvm/test/CodeGen/ARM/load-combine-big-endian.ll @@ -456,12 +456,17 @@ define i32 @load_i32_by_bswap_i16(i32* %arg) { ; (i32) p[1] | (sext(p[0] << 16) to i32) define i32 @load_i32_by_sext_i16(i32* %arg) { ; CHECK-LABEL: load_i32_by_sext_i16: -; CHECK: ldr r0, [r0] +; CHECK: ldrh r1, [r0] +; CHECK-NEXT: ldrh r0, [r0, #2] +; CHECK-NEXT: orr r0, r0, r1, lsl #16 ; CHECK-NEXT: mov pc, lr -; + ; CHECK-ARMv6-LABEL: load_i32_by_sext_i16: -; CHECK-ARMv6: ldr r0, [r0] +; CHECK-ARMv6: ldrh r1, [r0] +; CHECK-ARMv6-NEXT: ldrh r0, [r0, #2] +; CHECK-ARMv6-NEXT: orr r0, r0, r1, lsl #16 ; CHECK-ARMv6-NEXT: bx lr + %tmp = bitcast i32* %arg to i16* %tmp1 = load i16, i16* %tmp, align 4 %tmp2 = sext i16 %tmp1 to i32 |
