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| author | Stephen Lin <stephenwlin@gmail.com> | 2013-07-18 18:35:22 +0000 |
|---|---|---|
| committer | Stephen Lin <stephenwlin@gmail.com> | 2013-07-18 18:35:22 +0000 |
| commit | 3e1f15abc28c71ec6d28a37240299a51bae515d9 (patch) | |
| tree | 5f1dd2ff07aecd3567c4d62ce0fbf6962c333c77 /llvm/test/CodeGen/ARM/ldstrex.ll | |
| parent | bb3398f0004fe0abd75fc637ed9838940429e960 (diff) | |
| download | bcm5719-llvm-3e1f15abc28c71ec6d28a37240299a51bae515d9.tar.gz bcm5719-llvm-3e1f15abc28c71ec6d28a37240299a51bae515d9.zip | |
Update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change.
llvm-svn: 186594
Diffstat (limited to 'llvm/test/CodeGen/ARM/ldstrex.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/ldstrex.ll | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/llvm/test/CodeGen/ARM/ldstrex.ll b/llvm/test/CodeGen/ARM/ldstrex.ll index deed80fae65..5eaae53da99 100644 --- a/llvm/test/CodeGen/ARM/ldstrex.ll +++ b/llvm/test/CodeGen/ARM/ldstrex.ll @@ -5,7 +5,7 @@ %0 = type { i32, i32 } -; CHECK: f0: +; CHECK-LABEL: f0: ; CHECK: ldrexd define i64 @f0(i8* %p) nounwind readonly { entry: @@ -19,7 +19,7 @@ entry: ret i64 %4 } -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: strexd define i32 @f1(i8* %ptr, i64 %val) nounwind { entry: @@ -33,7 +33,7 @@ entry: declare %0 @llvm.arm.ldrexd(i8*) nounwind readonly declare i32 @llvm.arm.strexd(i32, i32, i8*) nounwind -; CHECK: test_load_i8: +; CHECK-LABEL: test_load_i8: ; CHECK: ldrexb r0, [r0] ; CHECK-NOT: uxtb define i32 @test_load_i8(i8* %addr) { @@ -41,7 +41,7 @@ define i32 @test_load_i8(i8* %addr) { ret i32 %val } -; CHECK: test_load_i16: +; CHECK-LABEL: test_load_i16: ; CHECK: ldrexh r0, [r0] ; CHECK-NOT: uxth define i32 @test_load_i16(i16* %addr) { @@ -49,7 +49,7 @@ define i32 @test_load_i16(i16* %addr) { ret i32 %val } -; CHECK: test_load_i32: +; CHECK-LABEL: test_load_i32: ; CHECK: ldrex r0, [r0] define i32 @test_load_i32(i32* %addr) { %val = call i32 @llvm.arm.ldrex.p0i32(i32* %addr) @@ -60,7 +60,7 @@ declare i32 @llvm.arm.ldrex.p0i8(i8*) nounwind readonly declare i32 @llvm.arm.ldrex.p0i16(i16*) nounwind readonly declare i32 @llvm.arm.ldrex.p0i32(i32*) nounwind readonly -; CHECK: test_store_i8: +; CHECK-LABEL: test_store_i8: ; CHECK-NOT: uxtb ; CHECK: strexb r0, r1, [r2] define i32 @test_store_i8(i32, i8 %val, i8* %addr) { @@ -69,7 +69,7 @@ define i32 @test_store_i8(i32, i8 %val, i8* %addr) { ret i32 %res } -; CHECK: test_store_i16: +; CHECK-LABEL: test_store_i16: ; CHECK-NOT: uxth ; CHECK: strexh r0, r1, [r2] define i32 @test_store_i16(i32, i16 %val, i16* %addr) { @@ -78,7 +78,7 @@ define i32 @test_store_i16(i32, i16 %val, i16* %addr) { ret i32 %res } -; CHECK: test_store_i32: +; CHECK-LABEL: test_store_i32: ; CHECK: strex r0, r1, [r2] define i32 @test_store_i32(i32, i32 %val, i32* %addr) { %res = call i32 @llvm.arm.strex.p0i32(i32 %val, i32* %addr) @@ -89,7 +89,7 @@ declare i32 @llvm.arm.strex.p0i8(i32, i8*) nounwind declare i32 @llvm.arm.strex.p0i16(i32, i16*) nounwind declare i32 @llvm.arm.strex.p0i32(i32, i32*) nounwind -; CHECK: test_clear: +; CHECK-LABEL: test_clear: ; CHECK: clrex define void @test_clear() { call void @llvm.arm.clrex() @@ -101,7 +101,7 @@ declare void @llvm.arm.clrex() nounwind @base = global i32* null define void @excl_addrmode() { -; CHECK-T2ADDRMODE: excl_addrmode: +; CHECK-T2ADDRMODE-LABEL: excl_addrmode: %base1020 = load i32** @base %offset1020 = getelementptr i32* %base1020, i32 255 call i32 @llvm.arm.ldrex.p0i32(i32* %offset1020) |
