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| author | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
|---|---|---|
| committer | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
| commit | a79ac14fa68297f9888bc70a10df5ed9b8864e38 (patch) | |
| tree | 8d8217a8928e3ee599bdde405e2e178b3a55b645 /llvm/test/CodeGen/ARM/ldstrex-m.ll | |
| parent | 83687fb9e654c9d0086e7f6b728c26fa0b729e71 (diff) | |
| download | bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.tar.gz bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.zip | |
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
Diffstat (limited to 'llvm/test/CodeGen/ARM/ldstrex-m.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/ldstrex-m.ll | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/ARM/ldstrex-m.ll b/llvm/test/CodeGen/ARM/ldstrex-m.ll index b50699f4cde..3d83a9d78e3 100644 --- a/llvm/test/CodeGen/ARM/ldstrex-m.ll +++ b/llvm/test/CodeGen/ARM/ldstrex-m.ll @@ -4,7 +4,7 @@ ; CHECK-NOT: ldrexd define i64 @f0(i64* %p) nounwind readonly { entry: - %0 = load atomic i64* %p seq_cst, align 8 + %0 = load atomic i64, i64* %p seq_cst, align 8 ret i64 %0 } @@ -29,7 +29,7 @@ entry: ; CHECK: ldr define i32 @f3(i32* %p) nounwind readonly { entry: - %0 = load atomic i32* %p seq_cst, align 4 + %0 = load atomic i32, i32* %p seq_cst, align 4 ret i32 %0 } @@ -37,7 +37,7 @@ entry: ; CHECK: ldrb define i8 @f4(i8* %p) nounwind readonly { entry: - %0 = load atomic i8* %p seq_cst, align 4 + %0 = load atomic i8, i8* %p seq_cst, align 4 ret i8 %0 } |

