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author | David Green <david.green@arm.com> | 2019-02-22 12:23:31 +0000 |
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committer | David Green <david.green@arm.com> | 2019-02-22 12:23:31 +0000 |
commit | acb628b2afb4b43dd0224c393f1ff47abd3b9045 (patch) | |
tree | 223e13b3ebc8f61820963caf6736ea99f6fe8218 /llvm/test/CodeGen/ARM/intrinsics-overflow.ll | |
parent | 0cc32dd4a13472702181e41fc17c8161c4999534 (diff) | |
download | bcm5719-llvm-acb628b2afb4b43dd0224c393f1ff47abd3b9045.tar.gz bcm5719-llvm-acb628b2afb4b43dd0224c393f1ff47abd3b9045.zip |
[ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs
This adds a number of missing Thumb1 opcodes so that the peephole optimiser can
remove redundant CMP instructions.
Reapplying this after the first attempt broke non-thumb1 code as the t2ADDri
instruction can be used with frame indices. In thumb1 we use tADDframe.
Differential Revision: https://reviews.llvm.org/D57833
llvm-svn: 354667
Diffstat (limited to 'llvm/test/CodeGen/ARM/intrinsics-overflow.ll')
-rw-r--r-- | llvm/test/CodeGen/ARM/intrinsics-overflow.ll | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/ARM/intrinsics-overflow.ll b/llvm/test/CodeGen/ARM/intrinsics-overflow.ll index d4c20dfacce..c3f64072d7d 100644 --- a/llvm/test/CodeGen/ARM/intrinsics-overflow.ll +++ b/llvm/test/CodeGen/ARM/intrinsics-overflow.ll @@ -38,8 +38,7 @@ define i32 @sadd_overflow(i32 %a, i32 %b) #0 { ; ARM: movvc r[[R0]], #0 ; ARM: mov pc, lr - ; THUMBV6: adds r1, r0, r1 - ; THUMBV6: cmp r1, r0 + ; THUMBV6: adds r0, r0, r1 ; THUMBV6: bvc .LBB1_2 ; THUMBV7: adds r[[R2:[0-9]+]], r[[R0]], r[[R1:[0-9]+]] |