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| author | Renato Golin <renato.golin@linaro.org> | 2015-02-25 14:41:06 +0000 |
|---|---|---|
| committer | Renato Golin <renato.golin@linaro.org> | 2015-02-25 14:41:06 +0000 |
| commit | b9887ef32a5d06108dfabbbe181bd8e4ea7abbfe (patch) | |
| tree | e470f2ae641ff070823cdb61580fd2a777e60b22 /llvm/test/CodeGen/ARM/frame-register.ll | |
| parent | a9b01eb77641cce46dcc69bce27635a72187a89c (diff) | |
| download | bcm5719-llvm-b9887ef32a5d06108dfabbbe181bd8e4ea7abbfe.tar.gz bcm5719-llvm-b9887ef32a5d06108dfabbbe181bd8e4ea7abbfe.zip | |
Improve handling of stack accesses in Thumb-1
Thumb-1 only allows SP-based LDR and STR to be word-sized, and SP-base LDR,
STR, and ADD only allow offsets that are a multiple of 4. Make some changes
to better make use of these instructions:
* Use word loads for anyext byte and halfword loads from the stack.
* Enforce 4-byte alignment on objects accessed in this way, to ensure that
the offset is valid.
* Do the same for objects whose frame index is used, in order to avoid having
to use more than one ADD to generate the frame index.
* Correct how many bits of offset we think AddrModeT1_s has.
Patch by John Brawn.
llvm-svn: 230496
Diffstat (limited to 'llvm/test/CodeGen/ARM/frame-register.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/frame-register.ll | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/ARM/frame-register.ll b/llvm/test/CodeGen/ARM/frame-register.ll index e6a55bddaf1..b04e376693d 100644 --- a/llvm/test/CodeGen/ARM/frame-register.ll +++ b/llvm/test/CodeGen/ARM/frame-register.ll @@ -30,9 +30,9 @@ entry: ; CHECK-ARM: push {r11, lr} ; CHECK-ARM: mov r11, sp -; CHECK-THUMB: push {r4, r6, r7, lr} -; CHECK-THUMB: add r7, sp, #8 +; CHECK-THUMB: push {r7, lr} +; CHECK-THUMB: add r7, sp, #0 ; CHECK-DARWIN-ARM: push {r7, lr} -; CHECK-DARWIN-THUMB: push {r4, r7, lr} +; CHECK-DARWIN-THUMB: push {r7, lr} |

