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authorAnton Korobeynikov <asl@math.spbu.ru>2012-08-14 23:36:01 +0000
committerAnton Korobeynikov <asl@math.spbu.ru>2012-08-14 23:36:01 +0000
commitc6d945b11abdab886c1e5da295f2b088bcd0c1af (patch)
tree9a88bf91ca4574389ccd00589e7bf3fa5545811c /llvm/test/CodeGen/ARM/fp16.ll
parent5f61a7498b43589d6fa6617d2e1793c6edc37bbf (diff)
downloadbcm5719-llvm-c6d945b11abdab886c1e5da295f2b088bcd0c1af.tar.gz
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The names of VFP variants of half-to-float conversion instructions were
reversed. This leads to wrong codegen for float-to-half conversion intrinsics which are used to support storage-only fp16 type. NEON variants of same instructions are fine. llvm-svn: 161907
Diffstat (limited to 'llvm/test/CodeGen/ARM/fp16.ll')
-rw-r--r--llvm/test/CodeGen/ARM/fp16.ll6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/ARM/fp16.ll b/llvm/test/CodeGen/ARM/fp16.ll
index c5583b94bef..1261ea50212 100644
--- a/llvm/test/CodeGen/ARM/fp16.ll
+++ b/llvm/test/CodeGen/ARM/fp16.ll
@@ -15,14 +15,14 @@ entry:
%1 = load i16* @y, align 2
%2 = tail call float @llvm.convert.from.fp16(i16 %0)
; CHECK: __gnu_h2f_ieee
-; CHECK-FP16: vcvtb.f16.f32
+; CHECK-FP16: vcvtb.f32.f16
%3 = tail call float @llvm.convert.from.fp16(i16 %1)
; CHECK: __gnu_h2f_ieee
-; CHECK-FP16: vcvtb.f16.f32
+; CHECK-FP16: vcvtb.f32.f16
%4 = fadd float %2, %3
%5 = tail call i16 @llvm.convert.to.fp16(float %4)
; CHECK: __gnu_f2h_ieee
-; CHECK-FP16: vcvtb.f32.f16
+; CHECK-FP16: vcvtb.f16.f32
store i16 %5, i16* @x, align 2
ret void
}
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