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authorCameron Zwarich <zwarich@apple.com>2011-04-02 02:40:43 +0000
committerCameron Zwarich <zwarich@apple.com>2011-04-02 02:40:43 +0000
commit6fe5c294302615875d9975d6f3d38f3b9bb294a2 (patch)
treebaf172921f60b9dd82a2ca15ce204267b51cb174 /llvm/test/CodeGen/ARM/fp-arg-shuffle.ll
parent8c7bbc09e2287533d48e932b4c833be3cdc37409 (diff)
downloadbcm5719-llvm-6fe5c294302615875d9975d6f3d38f3b9bb294a2.tar.gz
bcm5719-llvm-6fe5c294302615875d9975d6f3d38f3b9bb294a2.zip
Do some peephole optimizations to remove pointless VMOVs from Neon to integer
registers that arise from argument shuffling with the soft float ABI. These instructions are particularly slow on Cortex A8. This fixes one half of <rdar://problem/8674845>. llvm-svn: 128759
Diffstat (limited to 'llvm/test/CodeGen/ARM/fp-arg-shuffle.ll')
-rw-r--r--llvm/test/CodeGen/ARM/fp-arg-shuffle.ll11
1 files changed, 11 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/ARM/fp-arg-shuffle.ll b/llvm/test/CodeGen/ARM/fp-arg-shuffle.ll
new file mode 100644
index 00000000000..59303ac06da
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/fp-arg-shuffle.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=arm -mattr=+neon -float-abi=soft | FileCheck %s
+
+; CHECK: function1
+; CHECK-NOT: vmov r
+define double @function1(double %a, double %b, double %c, double %d, double %e, double %f) nounwind noinline ssp {
+entry:
+ %call = tail call double @function2(double %f, double %e, double %d, double %c, double %b, double %a) nounwind
+ ret double %call
+}
+
+declare double @function2(double, double, double, double, double, double)
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