Add some missing isel predicates on def : pat patterns to avoid generating VFP vmla / vmls (they cause stalls). Disabling them in isel is properly not a right solution, I'll look into a proper solution next.

llvm-svn: 118922

1 files changed, 23 insertions, 8 deletions

diff --git a/llvm/test/CodeGen/ARM/fnmacs.ll b/llvm/test/CodeGen/ARM/fnmacs.ll
index 1d1d06a70ea..1763d46e06c 100644
--- a/llvm/test/CodeGen/ARM/fnmacs.ll
+++ b/llvm/test/CodeGen/ARM/fnmacs.ll
@@ -1,20 +1,35 @@
 ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=NEON
-; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=NEONFP
+; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=A8
 
-define float @test(float %acc, float %a, float %b) {
+define float @t1(float %acc, float %a, float %b) {
 entry:
+; VFP2: t1:
 ; VFP2: vmls.f32
-; NEON: vmls.f32
 
-; NEONFP-NOT: vmls
-; NEONFP-NOT: vmov.f32
-; NEONFP:     vmul.f32
-; NEONFP:     vsub.f32
-; NEONFP:     vmov
+; NEON: t1:
+; NEON: vmls.f32
 
+; A8: t1:
+; A8: vmul.f32
+; A8: vsub.f32
 	%0 = fmul float %a, %b
         %1 = fsub float %acc, %0
 	ret float %1
 }
 
+define double @t2(double %acc, double %a, double %b) {
+entry:
+; VFP2: t2:
+; VFP2: vmls.f64
+
+; NEON: t2:
+; NEON: vmls.f64
+
+; A8: t2:
+; A8: vmul.f64
+; A8: vsub.f64
+	%0 = fmul double %a, %b
+        %1 = fsub double %acc, %0
+	ret double %1
+}