diff options
| author | Jim Grosbach <grosbach@apple.com> | 2013-08-16 23:37:36 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2013-08-16 23:37:36 +0000 |
| commit | 3fa749102a2b1439efc9edf6a5f7332bb5a7548e (patch) | |
| tree | f59a2ba1de506b7b1f1c5d91cc1134baa9c6df9c /llvm/test/CodeGen/ARM/fast-isel-icmp.ll | |
| parent | 06c2a681253e7ade487521b248233e01949014cd (diff) | |
| download | bcm5719-llvm-3fa749102a2b1439efc9edf6a5f7332bb5a7548e.tar.gz bcm5719-llvm-3fa749102a2b1439efc9edf6a5f7332bb5a7548e.zip | |
ARM: Fast-isel register class constrain for extends.
Properly constrain the operand register class for instructions used
in [sz]ext expansion. Update more tests to use the verifier now that
we're getting the register classes correct.
rdar://12594152
llvm-svn: 188594
Diffstat (limited to 'llvm/test/CodeGen/ARM/fast-isel-icmp.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/fast-isel-icmp.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/ARM/fast-isel-icmp.ll b/llvm/test/CodeGen/ARM/fast-isel-icmp.ll index 5158c0c0019..85f449e3d71 100644 --- a/llvm/test/CodeGen/ARM/fast-isel-icmp.ll +++ b/llvm/test/CodeGen/ARM/fast-isel-icmp.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s --check-prefix=ARM ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -verify-machineinstrs | FileCheck %s --check-prefix=ARM -; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB +; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -verify-machineinstrs | FileCheck %s --check-prefix=THUMB define i32 @icmp_i16_signed(i16 %a, i16 %b) nounwind { entry: |
