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author | Chad Rosier <mcrosier@apple.com> | 2011-11-05 20:16:15 +0000 |
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committer | Chad Rosier <mcrosier@apple.com> | 2011-11-05 20:16:15 +0000 |
commit | d0191a53c976c3ca9fbe481cd48f4736968218d5 (patch) | |
tree | 32642fdd3049c97d630f284f8d5d123cea3cf39c /llvm/test/CodeGen/ARM/fast-isel-call.ll | |
parent | 6ff181ef3c72ad2504e3b2096e0d20139347124e (diff) | |
download | bcm5719-llvm-d0191a53c976c3ca9fbe481cd48f4736968218d5.tar.gz bcm5719-llvm-d0191a53c976c3ca9fbe481cd48f4736968218d5.zip |
Add support for passing i1, i8, and i16 call parameters. Also, be sure to
zero-extend the constant integer encoding. Test case provides testing for
both call parameters and materialization of i1, i8, and i16 types.
llvm-svn: 143821
Diffstat (limited to 'llvm/test/CodeGen/ARM/fast-isel-call.ll')
-rw-r--r-- | llvm/test/CodeGen/ARM/fast-isel-call.ll | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/ARM/fast-isel-call.ll b/llvm/test/CodeGen/ARM/fast-isel-call.ll new file mode 100644 index 00000000000..20046a32f99 --- /dev/null +++ b/llvm/test/CodeGen/ARM/fast-isel-call.ll @@ -0,0 +1,67 @@ +; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-darwin | FileCheck %s --check-prefix=ARM +; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=THUMB + +define i32 @t0(i1 zeroext %a) nounwind { + %1 = zext i1 %a to i32 + ret i32 %1 +} + +define i32 @t1(i8 signext %a) nounwind { + %1 = sext i8 %a to i32 + ret i32 %1 +} + +define i32 @t2(i8 zeroext %a) nounwind { + %1 = zext i8 %a to i32 + ret i32 %1 +} + +define i32 @t3(i16 signext %a) nounwind { + %1 = sext i16 %a to i32 + ret i32 %1 +} + +define i32 @t4(i16 zeroext %a) nounwind { + %1 = zext i16 %a to i32 + ret i32 %1 +} + +define void @foo(i8 %a, i16 %b) nounwind { +; ARM: foo +; THUMB: foo +;; Materialize i1 1 +; ARM: movw r2, #1 +;; zero-ext +; ARM: and r2, r2, #1 +; THUMB: and r2, r2, #1 + %1 = call i32 @t0(i1 zeroext 1) +; ARM: sxtb r2, r1 +; ARM: mov r0, r2 +; THUMB: sxtb r2, r1 +; THUMB: mov r0, r2 + %2 = call i32 @t1(i8 signext %a) +; ARM: uxtb r2, r1 +; ARM: mov r0, r2 +; THUMB: uxtb r2, r1 +; THUMB: mov r0, r2 + %3 = call i32 @t2(i8 zeroext %a) +; ARM: sxth r2, r1 +; ARM: mov r0, r2 +; THUMB: sxth r2, r1 +; THUMB: mov r0, r2 + %4 = call i32 @t3(i16 signext %b) +; ARM: uxth r2, r1 +; ARM: mov r0, r2 +; THUMB: uxth r2, r1 +; THUMB: mov r0, r2 + %5 = call i32 @t4(i16 zeroext %b) + +;; A few test to check materialization +;; Note: i1 1 was materialized with t1 call +; ARM: movw r1, #255 +%6 = call i32 @t2(i8 zeroext 255) +; ARM: movw r1, #65535 +; THUMB: movw r1, #65535 +%7 = call i32 @t4(i16 zeroext 65535) + ret void +} |