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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2013-10-07 18:06:48 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2013-10-07 18:06:48 +0000 |
commit | fbcbce439d51125939509efc3717b8ccb893a22b (patch) | |
tree | 9a4a8ce759e9be38f0bc53d4c216db2f140addab /llvm/test/CodeGen/ARM/divmod.ll | |
parent | 41b165335030478a23174f0216e4af198a7b631b (diff) | |
download | bcm5719-llvm-fbcbce439d51125939509efc3717b8ccb893a22b.tar.gz bcm5719-llvm-fbcbce439d51125939509efc3717b8ccb893a22b.zip |
Change objectsize intrinsic to accept different address spaces.
Bitcasting everything to i8* won't work. Autoupgrade the old
intrinsic declarations to use the new mangling.
llvm-svn: 192117
Diffstat (limited to 'llvm/test/CodeGen/ARM/divmod.ll')
-rw-r--r-- | llvm/test/CodeGen/ARM/divmod.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/ARM/divmod.ll b/llvm/test/CodeGen/ARM/divmod.ll index 06d617293a6..7be0c796bd2 100644 --- a/llvm/test/CodeGen/ARM/divmod.ll +++ b/llvm/test/CodeGen/ARM/divmod.ll @@ -60,7 +60,7 @@ bb: %3 = load i32* @tabsize, align 4 %4 = srem i32 %cols, %3 %5 = sdiv i32 %cols, %3 - %6 = tail call i32 @llvm.objectsize.i32(i8* null, i1 false) + %6 = tail call i32 @llvm.objectsize.i32.p0i8(i8* null, i1 false) %7 = tail call i8* @__memset_chk(i8* null, i32 9, i32 %5, i32 %6) nounwind br label %bb1 @@ -71,7 +71,7 @@ bb1: ret void } -declare i32 @llvm.objectsize.i32(i8*, i1) nounwind readnone +declare i32 @llvm.objectsize.i32.p0i8(i8*, i1) nounwind readnone declare i8* @__memset_chk(i8*, i32, i32, i32) nounwind ; rdar://11714607 |