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| author | Evan Cheng <evan.cheng@apple.com> | 2010-08-11 07:17:46 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-08-11 07:17:46 +0000 |
| commit | 5190f092911b2857fd0521f5ac993cb723262483 (patch) | |
| tree | 1ce4cff379cdf9e2260b025cb80c78d4903e90a7 /llvm/test/CodeGen/ARM/div.ll | |
| parent | 163b624b4e000d3fbd1e30c69f1128c6eec0f659 (diff) | |
| download | bcm5719-llvm-5190f092911b2857fd0521f5ac993cb723262483.tar.gz bcm5719-llvm-5190f092911b2857fd0521f5ac993cb723262483.zip | |
Report error if codegen tries to instantiate a ARM target when the cpu does support it. e.g. cortex-m* processors.
llvm-svn: 110798
Diffstat (limited to 'llvm/test/CodeGen/ARM/div.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/div.ll | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/llvm/test/CodeGen/ARM/div.ll b/llvm/test/CodeGen/ARM/div.ll index d833afa5558..448b437ddf4 100644 --- a/llvm/test/CodeGen/ARM/div.ll +++ b/llvm/test/CodeGen/ARM/div.ll @@ -1,13 +1,9 @@ ; RUN: llc < %s -march=arm | FileCheck %s -check-prefix=CHECK-ARM -; RUN: llc < %s -march=arm -mcpu=cortex-m3 \ -; RUN: | FileCheck %s -check-prefix=CHECK-ARMV7M define i32 @f1(i32 %a, i32 %b) { entry: ; CHECK-ARM: f1 ; CHECK-ARM: __divsi3 -; CHECK-ARMV7M: f1 -; CHECK-ARMV7M: sdiv %tmp1 = sdiv i32 %a, %b ; <i32> [#uses=1] ret i32 %tmp1 } @@ -16,8 +12,6 @@ define i32 @f2(i32 %a, i32 %b) { entry: ; CHECK-ARM: f2 ; CHECK-ARM: __udivsi3 -; CHECK-ARMV7M: f2 -; CHECK-ARMV7M: udiv %tmp1 = udiv i32 %a, %b ; <i32> [#uses=1] ret i32 %tmp1 } @@ -26,8 +20,6 @@ define i32 @f3(i32 %a, i32 %b) { entry: ; CHECK-ARM: f3 ; CHECK-ARM: __modsi3 -; CHECK-ARMV7M: f3 -; CHECK-ARMV7M: sdiv %tmp1 = srem i32 %a, %b ; <i32> [#uses=1] ret i32 %tmp1 } @@ -36,8 +28,6 @@ define i32 @f4(i32 %a, i32 %b) { entry: ; CHECK-ARM: f4 ; CHECK-ARM: __umodsi3 -; CHECK-ARMV7M: f4 -; CHECK-ARMV7M: udiv %tmp1 = urem i32 %a, %b ; <i32> [#uses=1] ret i32 %tmp1 } |
