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| author | Kristof Beyls <kristof.beyls@arm.com> | 2017-06-28 07:07:03 +0000 |
|---|---|---|
| committer | Kristof Beyls <kristof.beyls@arm.com> | 2017-06-28 07:07:03 +0000 |
| commit | eecb353d0e25bae018bad815f9169c73666af5bd (patch) | |
| tree | 6ff0e4920f837efd600ae00ba9dbaa896d552792 /llvm/test/CodeGen/ARM/cttz.ll | |
| parent | 7a82cffd68bccfea62762873375e30503dcc0bf8 (diff) | |
| download | bcm5719-llvm-eecb353d0e25bae018bad815f9169c73666af5bd.tar.gz bcm5719-llvm-eecb353d0e25bae018bad815f9169c73666af5bd.zip | |
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
The benchmarking summarized in
http://lists.llvm.org/pipermail/llvm-dev/2017-May/113525.html showed
this is beneficial for a wide range of cores.
As is to be expected, quite a few small adaptations are needed to the
regressions tests, as the difference in scheduling results in:
- Quite a few small instruction schedule differences.
- A few changes in register allocation decisions caused by different
instruction schedules.
- A few changes in IfConversion decisions, due to a difference in
instruction schedule and/or the estimated cost of a branch mispredict.
llvm-svn: 306514
Diffstat (limited to 'llvm/test/CodeGen/ARM/cttz.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/cttz.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/ARM/cttz.ll b/llvm/test/CodeGen/ARM/cttz.ll index dacfca50593..cba7be58331 100644 --- a/llvm/test/CodeGen/ARM/cttz.ll +++ b/llvm/test/CodeGen/ARM/cttz.ll @@ -40,8 +40,8 @@ define i64 @test_i64(i64 %a) { ; CHECK-LABEL: test_i64: ; CHECK: rbit ; CHECK: rbit -; CHECK: cmp ; CHECK: clz +; CHECK: cmp ; CHECK: add ; CHECK: clzne %tmp = call i64 @llvm.cttz.i64(i64 %a, i1 false) @@ -81,8 +81,8 @@ define i64 @test_i64_zero_undef(i64 %a) { ; CHECK-LABEL: test_i64_zero_undef: ; CHECK: rbit ; CHECK: rbit -; CHECK: cmp ; CHECK: clz +; CHECK: cmp ; CHECK: add ; CHECK: clzne %tmp = call i64 @llvm.cttz.i64(i64 %a, i1 true) |
