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| author | David Green <david.green@arm.com> | 2018-04-27 11:29:49 +0000 |
|---|---|---|
| committer | David Green <david.green@arm.com> | 2018-04-27 11:29:49 +0000 |
| commit | c4cccea4c92e19c68c525c8e3fdee4f555be4de3 (patch) | |
| tree | 89c4c9d6945251afde0189ca46690b52c82b23d2 /llvm/test/CodeGen/ARM/cortexr52-misched-basic.ll | |
| parent | 4700faa28ec2653fac95865bc493483b7a1c70ad (diff) | |
| download | bcm5719-llvm-c4cccea4c92e19c68c525c8e3fdee4f555be4de3.tar.gz bcm5719-llvm-c4cccea4c92e19c68c525c8e3fdee4f555be4de3.zip | |
[ARM] Enable misched for R52.
Back when the R52 schedule was added in rL286949, there was no way
to enable machine schedules in ARM for specific cores. Since then a
target feature has been added. This enables the feature for R52,
removing the need to manually specify compiler flags.
llvm-svn: 331027
Diffstat (limited to 'llvm/test/CodeGen/ARM/cortexr52-misched-basic.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/cortexr52-misched-basic.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/ARM/cortexr52-misched-basic.ll b/llvm/test/CodeGen/ARM/cortexr52-misched-basic.ll index 0edc6653a03..c6bff0c9d5a 100644 --- a/llvm/test/CodeGen/ARM/cortexr52-misched-basic.ll +++ b/llvm/test/CodeGen/ARM/cortexr52-misched-basic.ll @@ -1,5 +1,5 @@ ; REQUIRES: asserts -; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=cortex-r52 -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s --check-prefix=CHECK --check-prefix=R52_SCHED +; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=cortex-r52 -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s --check-prefix=CHECK --check-prefix=R52_SCHED ; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=generic -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC ; ; Check the latency for instructions for both generic and cortex-r52. |
