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| author | Guozhi Wei <carrot@google.com> | 2019-08-08 20:25:23 +0000 |
|---|---|---|
| committer | Guozhi Wei <carrot@google.com> | 2019-08-08 20:25:23 +0000 |
| commit | 80347c3acc08a653cb4dd64411d86c35ac73011e (patch) | |
| tree | f44c9a35f5409f87d6e74ed03f5ffca7ff1bf9f5 /llvm/test/CodeGen/ARM/code-placement.ll | |
| parent | 8b49e0fd39f946d0d2e6e3979a893b89dec1d9e0 (diff) | |
| download | bcm5719-llvm-80347c3acc08a653cb4dd64411d86c35ac73011e.tar.gz bcm5719-llvm-80347c3acc08a653cb4dd64411d86c35ac73011e.zip | |
[MBP] Disable aggressive loop rotate in plain mode
Patch https://reviews.llvm.org/D43256 introduced more aggressive loop layout optimization which depends on profile information. If profile information is not available, the statically estimated profile information(generated by BranchProbabilityInfo.cpp) is used. If user program doesn't behave as BranchProbabilityInfo.cpp expected, the layout may be worse.
To be conservative this patch restores the original layout algorithm in plain mode. But user can still try the aggressive layout optimization with -force-precise-rotation-cost=true.
Differential Revision: https://reviews.llvm.org/D65673
llvm-svn: 368339
Diffstat (limited to 'llvm/test/CodeGen/ARM/code-placement.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/code-placement.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/ARM/code-placement.ll b/llvm/test/CodeGen/ARM/code-placement.ll index e0db88aa670..362a0902883 100644 --- a/llvm/test/CodeGen/ARM/code-placement.ll +++ b/llvm/test/CodeGen/ARM/code-placement.ll @@ -38,9 +38,8 @@ entry: br i1 %0, label %bb5, label %bb.nph15 bb1: ; preds = %bb2.preheader, %bb1 -; CHECK: LBB1_[[BB3:.]]: @ %bb3 ; CHECK: LBB1_[[PREHDR:.]]: @ %bb2.preheader -; CHECK: bmi LBB1_[[BB3]] +; CHECK: bmi LBB1_[[BB3:.]] %indvar = phi i32 [ %indvar.next, %bb1 ], [ 0, %bb2.preheader ] ; <i32> [#uses=2] %sum.08 = phi i32 [ %2, %bb1 ], [ %sum.110, %bb2.preheader ] ; <i32> [#uses=1] %tmp17 = sub i32 %i.07, %indvar ; <i32> [#uses=1] @@ -54,6 +53,7 @@ bb1: ; preds = %bb2.preheader, %bb1 bb3: ; preds = %bb1, %bb2.preheader ; CHECK: LBB1_[[BB1:.]]: @ %bb1 ; CHECK: bne LBB1_[[BB1]] +; CHECK: LBB1_[[BB3]]: @ %bb3 %sum.0.lcssa = phi i32 [ %sum.110, %bb2.preheader ], [ %2, %bb1 ] ; <i32> [#uses=2] %3 = add i32 %pass.011, 1 ; <i32> [#uses=2] %exitcond18 = icmp eq i32 %3, %passes ; <i1> [#uses=1] |
