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| author | Oliver Stannard <oliver.stannard@arm.com> | 2014-10-01 13:13:18 +0000 |
|---|---|---|
| committer | Oliver Stannard <oliver.stannard@arm.com> | 2014-10-01 13:13:18 +0000 |
| commit | d4e0a4fd2c74a41a32a9817667bb1394cc84f124 (patch) | |
| tree | d7dd14b3a7cb2b372325853d9408dbd9a5880cf2 /llvm/test/CodeGen/ARM/arm32-rounding.ll | |
| parent | 81f59a09f22fde3aaeffb97574ea438e511d5988 (diff) | |
| download | bcm5719-llvm-d4e0a4fd2c74a41a32a9817667bb1394cc84f124.tar.gz bcm5719-llvm-d4e0a4fd2c74a41a32a9817667bb1394cc84f124.zip | |
[ARM] Allow selecting VRINT[APMXZR] and VCVT[BT] instructions for FPv5
Currently, we only codegen the VRINT[APMXZR] and VCVT[BT] instructions
when targeting ARMv8, but they are actually present on any target with
FP-ARMv8. Note that FP-ARMv8 is called FPv5 when is is part of an
M-profile core, but they have the same instructions so we model them
both as FPARMv8 in the ARM backend.
llvm-svn: 218763
Diffstat (limited to 'llvm/test/CodeGen/ARM/arm32-rounding.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/arm32-rounding.ll | 22 |
1 files changed, 15 insertions, 7 deletions
diff --git a/llvm/test/CodeGen/ARM/arm32-rounding.ll b/llvm/test/CodeGen/ARM/arm32-rounding.ll index 00642b23fee..f247648d814 100644 --- a/llvm/test/CodeGen/ARM/arm32-rounding.ll +++ b/llvm/test/CodeGen/ARM/arm32-rounding.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -mtriple=armv8-linux-gnueabihf -mattr=+fp-armv8 | FileCheck %s +; RUN: llc < %s -mtriple=armv8-linux-gnueabihf -mattr=+fp-armv8 | FileCheck --check-prefix=CHECK --check-prefix=DP %s +; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabihf -mattr=+fp-armv8,+d16,+fp-only-sp | FileCheck --check-prefix=SP %s +; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabihf -mattr=+fp-armv8,+d16 | FileCheck --check-prefix=DP %s ; CHECK-LABEL: test1 ; CHECK: vrintm.f32 @@ -9,7 +11,8 @@ entry: } ; CHECK-LABEL: test2 -; CHECK: vrintm.f64 +; SP: b floor +; DP: vrintm.f64 define double @test2(double %a) { entry: %call = call double @floor(double %a) nounwind readnone @@ -25,7 +28,8 @@ entry: } ; CHECK-LABEL: test4 -; CHECK: vrintp.f64 +; SP: b ceil +; DP: vrintp.f64 define double @test4(double %a) { entry: %call = call double @ceil(double %a) nounwind readnone @@ -41,7 +45,8 @@ entry: } ; CHECK-LABEL: test6 -; CHECK: vrinta.f64 +; SP: b round +; DP: vrinta.f64 define double @test6(double %a) { entry: %call = call double @round(double %a) nounwind readnone @@ -57,7 +62,8 @@ entry: } ; CHECK-LABEL: test8 -; CHECK: vrintz.f64 +; SP: b trunc +; DP: vrintz.f64 define double @test8(double %a) { entry: %call = call double @trunc(double %a) nounwind readnone @@ -73,7 +79,8 @@ entry: } ; CHECK-LABEL: test10 -; CHECK: vrintr.f64 +; SP: b nearbyint +; DP: vrintr.f64 define double @test10(double %a) { entry: %call = call double @nearbyint(double %a) nounwind readnone @@ -89,7 +96,8 @@ entry: } ; CHECK-LABEL: test12 -; CHECK: vrintx.f64 +; SP: b rint +; DP: vrintx.f64 define double @test12(double %a) { entry: %call = call double @rint(double %a) nounwind readnone |
