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| author | Adam Nemet <anemet@apple.com> | 2015-07-17 18:14:19 +0000 |
|---|---|---|
| committer | Adam Nemet <anemet@apple.com> | 2015-07-17 18:14:19 +0000 |
| commit | 5a6d5bc17b385293e3337b9f2082151594f972f9 (patch) | |
| tree | 68b84e4d2228fbee8e8578f0092305e9cd9e78c4 /llvm/test/CodeGen/ARM/adv-copy-opt.ll | |
| parent | 4cb0ba311a91e7374290d4faddbc7d018b130095 (diff) | |
| download | bcm5719-llvm-5a6d5bc17b385293e3337b9f2082151594f972f9.tar.gz bcm5719-llvm-5a6d5bc17b385293e3337b9f2082151594f972f9.zip | |
Revert "ARM: Enable MachineScheduler and disable PostRAScheduler for swift."
This reverts commit r242500.
It broke some internal tests and Matthias asked me to revert it while he
is investigating.
llvm-svn: 242553
Diffstat (limited to 'llvm/test/CodeGen/ARM/adv-copy-opt.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/adv-copy-opt.ll | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/llvm/test/CodeGen/ARM/adv-copy-opt.ll b/llvm/test/CodeGen/ARM/adv-copy-opt.ll index 395be345720..f71bf78b62c 100644 --- a/llvm/test/CodeGen/ARM/adv-copy-opt.ll +++ b/llvm/test/CodeGen/ARM/adv-copy-opt.ll @@ -11,25 +11,25 @@ ; r0 = r0 / r2 ; r1 = r1 / r3 ; -; NOOPT: vmov [[A:d[0-9]+]], r0, r1 -; NOOPT-NEXT: vmov [[B:d[0-9]+]], r2, r3 +; NOOPT: vmov [[B:d[0-9]+]], r2, r3 +; NOOPT-NEXT: vmov [[A:d[0-9]+]], r0, r1 ; Move the low part of B into a register. ; Unfortunately, we cannot express that the 's' register is the low ; part of B, i.e., sIdx == BIdx x 2. E.g., B = d1, B_low = s2. ; NOOPT-NEXT: vmov [[B_LOW:r[0-9]+]], s{{[0-9]+}} -; NOOPT-NEXT: vmov [[B_HIGH:r[0-9]+]], s{{[0-9]+}} ; NOOPT-NEXT: vmov [[A_LOW:r[0-9]+]], s{{[0-9]+}} -; NOOPT-NEXT: vmov [[A_HIGH:r[0-9]+]], s{{[0-9]+}} ; NOOPT-NEXT: udiv [[RES_LOW:r[0-9]+]], [[A_LOW]], [[B_LOW]] -; NOOPT-NEXT: vmov.32 [[RES:d[0-9]+]][0], [[RES_LOW]] +; NOOPT-NEXT: vmov [[B_HIGH:r[0-9]+]], s{{[0-9]+}} +; NOOPT-NEXT: vmov [[A_HIGH:r[0-9]+]], s{{[0-9]+}} ; NOOPT-NEXT: udiv [[RES_HIGH:r[0-9]+]], [[A_HIGH]], [[B_HIGH]] +; NOOPT-NEXT: vmov.32 [[RES:d[0-9]+]][0], [[RES_LOW]] ; NOOPT-NEXT: vmov.32 [[RES]][1], [[RES_HIGH]] ; NOOPT-NEXT: vmov r0, r1, [[RES]] ; NOOPT-NEXT: bx lr ; ; OPT-NOT: vmov -; OPT: udiv r1, r1, r3 -; OPT-NEXT: udiv r0, r0, r2 +; OPT: udiv r0, r0, r2 +; OPT-NEXT: udiv r1, r1, r3 ; OPT-NEXT: bx lr define <2 x i32> @simpleVectorDiv(<2 x i32> %A, <2 x i32> %B) nounwind { entry: |
