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| author | Jonas Paulsson <paulsson@linux.vnet.ibm.com> | 2018-10-30 15:04:40 +0000 |
|---|---|---|
| committer | Jonas Paulsson <paulsson@linux.vnet.ibm.com> | 2018-10-30 15:04:40 +0000 |
| commit | 611b533f1d544b85f1a98afbc9241deeb97d9497 (patch) | |
| tree | 4db26c1d883b521a32b55e1e3489edc8bd900fc2 /llvm/test/CodeGen/ARM/Windows | |
| parent | 023b1d19f3de5ed7cec535295bf0d7a9f99ea561 (diff) | |
| download | bcm5719-llvm-611b533f1d544b85f1a98afbc9241deeb97d9497.tar.gz bcm5719-llvm-611b533f1d544b85f1a98afbc9241deeb97d9497.zip | |
[SchedModel] Fix for read advance cycles with implicit pseudo operands.
The SchedModel allows the addition of ReadAdvances to express that certain
operands of the instructions are needed at a later point than the others.
RegAlloc may add pseudo operands that are not part of the instruction
descriptor, and therefore cannot have any read advance entries. This meant
that in some cases the desired read advance was nullified by such a pseudo
operand, which still had the original latency.
This patch fixes this by making sure that such pseudo operands get a zero
latency during DAG construction.
Review: Matthias Braun, Ulrich Weigand.
https://reviews.llvm.org/D49671
llvm-svn: 345606
Diffstat (limited to 'llvm/test/CodeGen/ARM/Windows')
| -rw-r--r-- | llvm/test/CodeGen/ARM/Windows/chkstk-movw-movt-isel.ll | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/Windows/chkstk.ll | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/Windows/memset.ll | 4 |
3 files changed, 8 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/ARM/Windows/chkstk-movw-movt-isel.ll b/llvm/test/CodeGen/ARM/Windows/chkstk-movw-movt-isel.ll index 019298d2080..e75df160e00 100644 --- a/llvm/test/CodeGen/ARM/Windows/chkstk-movw-movt-isel.ll +++ b/llvm/test/CodeGen/ARM/Windows/chkstk-movw-movt-isel.ll @@ -19,9 +19,9 @@ entry: ; CHECK-LABEL: isel ; CHECK: push {r4, r5, r6, lr} -; CHECK: movw r12, #0 -; CHECK: movt r12, #0 -; CHECK: movw r4, #{{\d*}} +; CHECK-DAG: movw r12, #0 +; CHECK-DAG: movt r12, #0 +; CHECK-DAG: movw r4, #{{\d*}} ; CHECK: blx r12 ; CHECK: sub.w sp, sp, r4 diff --git a/llvm/test/CodeGen/ARM/Windows/chkstk.ll b/llvm/test/CodeGen/ARM/Windows/chkstk.ll index 330c1f45850..8fd41461459 100644 --- a/llvm/test/CodeGen/ARM/Windows/chkstk.ll +++ b/llvm/test/CodeGen/ARM/Windows/chkstk.ll @@ -16,9 +16,9 @@ entry: ; CHECK-DEFAULT-CODE-MODEL: sub.w sp, sp, r4 ; CHECK-LARGE-CODE-MODEL: check_watermark: -; CHECK-LARGE-CODE-MODEL: movw r12, :lower16:__chkstk -; CHECK-LARGE-CODE-MODEL: movt r12, :upper16:__chkstk -; CHECK-LARGE-CODE-MODEL: movw r4, #1024 +; CHECK-LARGE-CODE-MODEL-DAG: movw r12, :lower16:__chkstk +; CHECK-LARGE-CODE-MODEL-DAG: movt r12, :upper16:__chkstk +; CHECK-LARGE-CODE-MODEL-DAG: movw r4, #1024 ; CHECK-LARGE-CODE-MODEL: blx r12 ; CHECK-LARGE-CODE-MODEL: sub.w sp, sp, r4 diff --git a/llvm/test/CodeGen/ARM/Windows/memset.ll b/llvm/test/CodeGen/ARM/Windows/memset.ll index c9b22f47a15..8cb257c1566 100644 --- a/llvm/test/CodeGen/ARM/Windows/memset.ll +++ b/llvm/test/CodeGen/ARM/Windows/memset.ll @@ -10,9 +10,9 @@ entry: unreachable } -; CHECK: movw r0, :lower16:source -; CHECK: movt r0, :upper16:source ; CHECK: movs r1, #0 ; CHECK: mov.w r2, #512 +; CHECK: movw r0, :lower16:source +; CHECK: movt r0, :upper16:source ; CHECK: memset |
