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authorSaleem Abdulrasool <compnerd@compnerd.org>2016-06-07 03:15:07 +0000
committerSaleem Abdulrasool <compnerd@compnerd.org>2016-06-07 03:15:07 +0000
commit532dcbc2c5d5b0a6ec757699e0b23d6a7417e12e (patch)
tree061b3e50c6f0d41328eef28f0038e0db0cbddb68 /llvm/test/CodeGen/ARM/Windows
parentce4eee495145d78ec66ff33e39df68d8654defdc (diff)
downloadbcm5719-llvm-532dcbc2c5d5b0a6ec757699e0b23d6a7417e12e.tar.gz
bcm5719-llvm-532dcbc2c5d5b0a6ec757699e0b23d6a7417e12e.zip
ARM: correct TLS access on WoA
TLS access requires an offset from the TLS index. The index itself is the section-relative distance of the symbol. For ARM, the relevant relocation (IMAGE_REL_ARM_SECREL) is applied as a constant. This means that the value may not be an immediate and must be lowered into a constant pool. This offset will not be base relocated. We were previously emitting the actual address of the symbol which would be base relocated and would therefore be the vaue offset by the ImageBase + TLS Offset. llvm-svn: 271974
Diffstat (limited to 'llvm/test/CodeGen/ARM/Windows')
-rw-r--r--llvm/test/CodeGen/ARM/Windows/tls.ll44
1 files changed, 29 insertions, 15 deletions
diff --git a/llvm/test/CodeGen/ARM/Windows/tls.ll b/llvm/test/CodeGen/ARM/Windows/tls.ll
index 9022f8af9f5..689f4e29187 100644
--- a/llvm/test/CodeGen/ARM/Windows/tls.ll
+++ b/llvm/test/CodeGen/ARM/Windows/tls.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple thumbv7--windows %s -o - | FileCheck %s
+; RUN: llc -mtriple thumbv7--windows-itanium %s -o - | FileCheck %s
@i = thread_local global i32 0
@j = external thread_local global i32
@@ -22,11 +22,13 @@ define i32 @f() {
; CHECK: ldr [[TLS_POINTER:r[0-9]]], {{\[}}[[TEB]], #44]
; CHECK-NEXT: ldr{{.w}} [[TLS:r[0-9]]], {{\[}}[[TLS_POINTER]], [[INDEX]], lsl #2]
-; CHECK-NEXT: movw [[SLOT:r[0-9]]], :lower16:i
-; CHECK-NEXT: movt [[SLOT]], :upper16:i
+; CHECK-NEXT: ldr [[SLOT:r[0-9]]], [[CPI:LCPI[0-9]+_[0-9]+]]
; CHECK-NEXT: ldr r0, {{\[}}[[TLS]], [[SLOT]]]
+; CHECK: [[CPI]]:
+; CHECK-NEXT: .long i(SECREL32)
+
define i32 @e() {
%1 = load i32, i32* @j
ret i32 %1
@@ -41,11 +43,13 @@ define i32 @e() {
; CHECK: ldr [[TLS_POINTER:r[0-9]]], {{\[}}[[TEB]], #44]
; CHECK-NEXT: ldr{{.w}} [[TLS:r[0-9]]], {{\[}}[[TLS_POINTER]], [[INDEX]], lsl #2]
-; CHECK-NEXT: movw [[SLOT:r[0-9]]], :lower16:j
-; CHECK-NEXT: movt [[SLOT]], :upper16:j
+; CHECK-NEXT: ldr [[SLOT:r[0-9]]], [[CPI:LCPI[0-9]+_[0-9]+]]
; CHECK-NEXT: ldr r0, {{\[}}[[TLS]], [[SLOT]]]
+; CHECK: [[CPI]]:
+; CHECK-NEXT: .long j(SECREL32)
+
define i32 @d() {
%1 = load i32, i32* @k
ret i32 %1
@@ -60,11 +64,13 @@ define i32 @d() {
; CHECK: ldr [[TLS_POINTER:r[0-9]]], {{\[}}[[TEB]], #44]
; CHECK-NEXT: ldr{{.w}} [[TLS:r[0-9]]], {{\[}}[[TLS_POINTER]], [[INDEX]], lsl #2]
-; CHECK-NEXT: movw [[SLOT:r[0-9]]], :lower16:k
-; CHECK-NEXT: movt [[SLOT]], :upper16:k
+; CHECK-NEXT: ldr [[SLOT:r[0-9]]], [[CPI:LCPI[0-9]+_[0-9]+]]
; CHECK-NEXT: ldr r0, {{\[}}[[TLS]], [[SLOT]]]
+; CHECK: [[CPI]]:
+; CHECK-NEXT: .long k(SECREL32)
+
define i32 @c() {
%1 = load i32, i32* @l
ret i32 %1
@@ -79,11 +85,13 @@ define i32 @c() {
; CHECK: ldr [[TLS_POINTER:r[0-9]]], {{\[}}[[TEB]], #44]
; CHECK-NEXT: ldr{{.w}} [[TLS:r[0-9]]], {{\[}}[[TLS_POINTER]], [[INDEX]], lsl #2]
-; CHECK-NEXT: movw [[SLOT:r[0-9]]], :lower16:l
-; CHECK-NEXT: movt [[SLOT]], :upper16:l
+; CHECK-NEXT: ldr [[SLOT:r[0-9]]], [[CPI:LCPI[0-9]+_[0-9]+]]
; CHECK-NEXT: ldr r0, {{\[}}[[TLS]], [[SLOT]]]
+; CHECK: [[CPI]]:
+; CHECK-NEXT: .long l(SECREL32)
+
define i32 @b() {
%1 = load i32, i32* @m
ret i32 %1
@@ -98,11 +106,13 @@ define i32 @b() {
; CHECK: ldr [[TLS_POINTER:r[0-9]]], {{\[}}[[TEB]], #44]
; CHECK-NEXT: ldr{{.w}} [[TLS:r[0-9]]], {{\[}}[[TLS_POINTER]], [[INDEX]], lsl #2]
-; CHECK-NEXT: movw [[SLOT:r[0-9]]], :lower16:m
-; CHECK-NEXT: movt [[SLOT]], :upper16:m
+; CHECK-NEXT: ldr [[SLOT:r[0-9]]], [[CPI:LCPI[0-9]+_[0-9]+]]
; CHECK-NEXT: ldr r0, {{\[}}[[TLS]], [[SLOT]]]
+; CHECK: [[CPI]]:
+; CHECK: .long m(SECREL32)
+
define i16 @a() {
%1 = load i16, i16* @n
ret i16 %1
@@ -117,11 +127,13 @@ define i16 @a() {
; CHECK: ldr [[TLS_POINTER:r[0-9]]], {{\[}}[[TEB]], #44]
; CHECK-NEXT: ldr{{.w}} [[TLS:r[0-9]]], {{\[}}[[TLS_POINTER]], [[INDEX]], lsl #2]
-; CHECK-NEXT: movw [[SLOT:r[0-9]]], :lower16:n
-; CHECK-NEXT: movt [[SLOT]], :upper16:n
+; CHECK-NEXT: ldr [[SLOT:r[0-9]]], [[CPI:LCPI[0-9]+_[0-9]+]]
; CHECK-NEXT: ldrh r0, {{\[}}[[TLS]], [[SLOT]]]
+; CHECK: [[CPI]]:
+; CHECK: .long n(SECREL32)
+
define i8 @Z() {
%1 = load i8, i8* @o
ret i8 %1
@@ -136,8 +148,10 @@ define i8 @Z() {
; CHECK: ldr [[TLS_POINTER:r[0-9]]], {{\[}}[[TEB]], #44]
; CHECK-NEXT: ldr{{.w}} [[TLS:r[0-9]]], {{\[}}[[TLS_POINTER]], [[INDEX]], lsl #2]
-; CHECK-NEXT: movw [[SLOT:r[0-9]]], :lower16:o
-; CHECK-NEXT: movt [[SLOT]], :upper16:o
+; CHECK-NEXT: ldr [[SLOT:r[0-9]]], [[CPI:LCPI[0-9]+_[0-9]+]]
; CHECK-NEXT: ldrb r0, {{\[}}[[TLS]], [[SLOT]]]
+; CHECK: [[CPI]]:
+; CHECK-NEXT: .long o(SECREL32)
+
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