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author | Saleem Abdulrasool <compnerd@compnerd.org> | 2015-08-04 03:57:56 +0000 |
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committer | Saleem Abdulrasool <compnerd@compnerd.org> | 2015-08-04 03:57:56 +0000 |
commit | 0a2672bb4392f0988cbb1f2480bc8686af0b849f (patch) | |
tree | 48d70c6d9aea06136825411dc227bbf92aabc481 /llvm/test/CodeGen/ARM/Windows/integer-floating-point-conversion.ll | |
parent | 67697a7ea90200ae823727498f3159c6d69d047a (diff) | |
download | bcm5719-llvm-0a2672bb4392f0988cbb1f2480bc8686af0b849f.tar.gz bcm5719-llvm-0a2672bb4392f0988cbb1f2480bc8686af0b849f.zip |
ARM: support windows division routines
This adds the software division routines for the Windows RTABI. These are not
expected to be used often though as most modern Windows ARM capable targets
support hardware division. In the case that the target CPU doesnt support
hardware division, this will be the fallback.
llvm-svn: 243952
Diffstat (limited to 'llvm/test/CodeGen/ARM/Windows/integer-floating-point-conversion.ll')
-rw-r--r-- | llvm/test/CodeGen/ARM/Windows/integer-floating-point-conversion.ll | 74 |
1 files changed, 0 insertions, 74 deletions
diff --git a/llvm/test/CodeGen/ARM/Windows/integer-floating-point-conversion.ll b/llvm/test/CodeGen/ARM/Windows/integer-floating-point-conversion.ll deleted file mode 100644 index acf21a1caad..00000000000 --- a/llvm/test/CodeGen/ARM/Windows/integer-floating-point-conversion.ll +++ /dev/null @@ -1,74 +0,0 @@ -; RUN: llc -mtriple thumbv7-windows -filetype asm -o - %s | FileCheck %s - -define arm_aapcs_vfpcc i64 @stoi64(float %f) { -entry: - %conv = fptosi float %f to i64 - ret i64 %conv -} - -; CHECK-LABEL: stoi64 -; CHECK: bl __stoi64 - -define arm_aapcs_vfpcc i64 @stou64(float %f) { -entry: - %conv = fptoui float %f to i64 - ret i64 %conv -} - -; CHECK-LABEL: stou64 -; CHECK: bl __stou64 - -define arm_aapcs_vfpcc float @i64tos(i64 %i64) { -entry: - %conv = sitofp i64 %i64 to float - ret float %conv -} - -; CHECK-LABEL: i64tos -; CHECK: bl __i64tos - -define arm_aapcs_vfpcc float @u64tos(i64 %u64) { -entry: - %conv = uitofp i64 %u64 to float - ret float %conv -} - -; CHECK-LABEL: u64tos -; CHECK: bl __u64tos - -define arm_aapcs_vfpcc i64 @dtoi64(double %d) { -entry: - %conv = fptosi double %d to i64 - ret i64 %conv -} - -; CHECK-LABEL: dtoi64 -; CHECK: bl __dtoi64 - -define arm_aapcs_vfpcc i64 @dtou64(double %d) { -entry: - %conv = fptoui double %d to i64 - ret i64 %conv -} - -; CHECK-LABEL: dtou64 -; CHECK: bl __dtou64 - -define arm_aapcs_vfpcc double @i64tod(i64 %i64) { -entry: - %conv = sitofp i64 %i64 to double - ret double %conv -} - -; CHECK-LABEL: i64tod -; CHECK: bl __i64tod - -define arm_aapcs_vfpcc double @u64tod(i64 %i64) { -entry: - %conv = uitofp i64 %i64 to double - ret double %conv -} - -; CHECK-LABEL: u64tod -; CHECK: bl __u64tod - |