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| author | Diana Picus <diana.picus@linaro.org> | 2017-04-11 10:52:34 +0000 |
|---|---|---|
| committer | Diana Picus <diana.picus@linaro.org> | 2017-04-11 10:52:34 +0000 |
| commit | 1314a2889c66b22c4175432fe43c6a129350396d (patch) | |
| tree | 049c5c384f6a252866f822fe8b58d7adc3d61bf3 /llvm/test/CodeGen/ARM/GlobalISel/arm-isel-fp.ll | |
| parent | e63a39d6cb5dac53b30e0dbda1af979f01a81158 (diff) | |
| download | bcm5719-llvm-1314a2889c66b22c4175432fe43c6a129350396d.tar.gz bcm5719-llvm-1314a2889c66b22c4175432fe43c6a129350396d.zip | |
GlobalISel: Allow legalizing G_FADD to a libcall
Use the same handling in the generic legalizer code as for the other
libcalls (G_FREM, G_FPOW).
Enable it on ARM for float and double so we can test it.
llvm-svn: 299931
Diffstat (limited to 'llvm/test/CodeGen/ARM/GlobalISel/arm-isel-fp.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/GlobalISel/arm-isel-fp.ll | 24 |
1 files changed, 21 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-isel-fp.ll b/llvm/test/CodeGen/ARM/GlobalISel/arm-isel-fp.ll index 7ef1b4e3639..7d021fdb43d 100644 --- a/llvm/test/CodeGen/ARM/GlobalISel/arm-isel-fp.ll +++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-isel-fp.ll @@ -1,6 +1,6 @@ -; RUN: llc -mtriple arm-gnueabihf -mattr=+vfp2 -float-abi=hard -global-isel %s -o - | FileCheck %s -; RUN: llc -mtriple arm-- -mattr=+vfp2 -float-abi=soft -global-isel %s -o - | FileCheck %s -; RUN: llc -mtriple arm-- -float-abi=soft -global-isel %s -o - | FileCheck %s +; RUN: llc -mtriple arm-linux-gnueabihf -mattr=+vfp2 -float-abi=hard -global-isel %s -o - | FileCheck %s -check-prefix CHECK -check-prefix HARD +; RUN: llc -mtriple arm-linux-gnueabi -mattr=+vfp2,+soft-float -float-abi=soft -global-isel %s -o - | FileCheck %s -check-prefix CHECK -check-prefix SOFT-AEABI +; RUN: llc -mtriple arm-linux-gnu- -mattr=+vfp2,+soft-float -float-abi=soft -global-isel %s -o - | FileCheck %s -check-prefix CHECK -check-prefix SOFT-DEFAULT define arm_aapcscc float @test_frem_float(float %x, float %y) { ; CHECK-LABEL: test_frem_float: @@ -31,3 +31,21 @@ define arm_aapcscc double @test_fpow_double(double %x, double %y) { %r = call double @llvm.pow.f64(double %x, double %y) ret double %r } + +define arm_aapcscc float @test_add_float(float %x, float %y) { +; CHECK-LABEL: test_add_float: +; HARD: vadd.f32 +; SOFT-AEABI: blx __aeabi_fadd +; SOFT-DEFAULT: blx __addsf3 + %r = fadd float %x, %y + ret float %r +} + +define arm_aapcscc double @test_add_double(double %x, double %y) { +; CHECK-LABEL: test_add_double: +; HARD: vadd.f64 +; SOFT-AEABI: blx __aeabi_dadd +; SOFT-DEFAULT: blx __adddf3 + %r = fadd double %x, %y + ret double %r +} |
