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authorDavid Blaikie <dblaikie@gmail.com>2015-02-27 21:17:42 +0000
committerDavid Blaikie <dblaikie@gmail.com>2015-02-27 21:17:42 +0000
commita79ac14fa68297f9888bc70a10df5ed9b8864e38 (patch)
tree8d8217a8928e3ee599bdde405e2e178b3a55b645 /llvm/test/CodeGen/ARM/2012-08-04-DtripleSpillReload.ll
parent83687fb9e654c9d0086e7f6b728c26fa0b729e71 (diff)
downloadbcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.tar.gz
bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.zip
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
Diffstat (limited to 'llvm/test/CodeGen/ARM/2012-08-04-DtripleSpillReload.ll')
-rw-r--r--llvm/test/CodeGen/ARM/2012-08-04-DtripleSpillReload.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/ARM/2012-08-04-DtripleSpillReload.ll b/llvm/test/CodeGen/ARM/2012-08-04-DtripleSpillReload.ll
index 70e30793455..6e0b828ad24 100644
--- a/llvm/test/CodeGen/ARM/2012-08-04-DtripleSpillReload.ll
+++ b/llvm/test/CodeGen/ARM/2012-08-04-DtripleSpillReload.ll
@@ -129,7 +129,7 @@ define arm_aapcs_vfpcc void @foo(float, i1 zeroext, i1 zeroext) nounwind uwtable
%45 = fmul <4 x float> undef, undef
%46 = fmul <4 x float> %45, %43
%47 = fmul <4 x float> undef, %44
- %48 = load <4 x float>* undef, align 8
+ %48 = load <4 x float>, <4 x float>* undef, align 8
%49 = bitcast <4 x float> %48 to <2 x i64>
%50 = shufflevector <2 x i64> %49, <2 x i64> undef, <1 x i32> <i32 1>
%51 = bitcast <1 x i64> %50 to <2 x float>
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