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| author | Stephen Lin <stephenwlin@gmail.com> | 2013-07-13 20:38:47 +0000 |
|---|---|---|
| committer | Stephen Lin <stephenwlin@gmail.com> | 2013-07-13 20:38:47 +0000 |
| commit | f799e3f9441c2a348af0357a61020cc1e397e66b (patch) | |
| tree | a423985b913cb793df9846a5fbcaca13c433bf47 /llvm/test/CodeGen/ARM/2011-11-07-PromoteVectorLoadStore.ll | |
| parent | 67fc79f9eaa2ba685f66586104a2a3ffd893f36d (diff) | |
| download | bcm5719-llvm-f799e3f9441c2a348af0357a61020cc1e397e66b.tar.gz bcm5719-llvm-f799e3f9441c2a348af0357a61020cc1e397e66b.zip | |
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.
This was done with the following sed invocation to catch label lines demarking function boundaries:
sed -i '' "s/^;\( *\)\([A-Z0-9_]*\):\( *\)test\([A-Za-z0-9_-]*\):\( *\)$/;\1\2-LABEL:\3test\4:\5/g" test/CodeGen/*/*.ll
which was written conservatively to avoid false positives rather than false negatives. I scanned through all the changes and everything looks correct.
llvm-svn: 186258
Diffstat (limited to 'llvm/test/CodeGen/ARM/2011-11-07-PromoteVectorLoadStore.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/2011-11-07-PromoteVectorLoadStore.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/ARM/2011-11-07-PromoteVectorLoadStore.ll b/llvm/test/CodeGen/ARM/2011-11-07-PromoteVectorLoadStore.ll index 113cbfe3962..8a65f2e82b7 100644 --- a/llvm/test/CodeGen/ARM/2011-11-07-PromoteVectorLoadStore.ll +++ b/llvm/test/CodeGen/ARM/2011-11-07-PromoteVectorLoadStore.ll @@ -6,7 +6,7 @@ @i8_src2 = global <2 x i8> <i8 2, i8 1> define void @test_neon_vector_add_2xi8() nounwind { -; CHECK: test_neon_vector_add_2xi8: +; CHECK-LABEL: test_neon_vector_add_2xi8: %1 = load <2 x i8>* @i8_src1 %2 = load <2 x i8>* @i8_src2 %3 = add <2 x i8> %1, %2 @@ -15,7 +15,7 @@ define void @test_neon_vector_add_2xi8() nounwind { } define void @test_neon_ld_st_volatile_with_ashr_2xi8() { -; CHECK: test_neon_ld_st_volatile_with_ashr_2xi8: +; CHECK-LABEL: test_neon_ld_st_volatile_with_ashr_2xi8: %1 = load volatile <2 x i8>* @i8_src1 %2 = load volatile <2 x i8>* @i8_src2 %3 = ashr <2 x i8> %1, %2 |
