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| author | Lang Hames <lhames@gmail.com> | 2011-11-02 22:52:45 +0000 |
|---|---|---|
| committer | Lang Hames <lhames@gmail.com> | 2011-11-02 22:52:45 +0000 |
| commit | 9929c423a17f58a35276192f2b47a6d8b85fed2c (patch) | |
| tree | 8a2f6b90a858aaa5394aa310a7e9abc69a435501 /llvm/test/CodeGen/ARM/2011-10-26-memset-with-neon.ll | |
| parent | 324dbd3b83e66106104ddbc7725fd973a29ad59d (diff) | |
| download | bcm5719-llvm-9929c423a17f58a35276192f2b47a6d8b85fed2c.tar.gz bcm5719-llvm-9929c423a17f58a35276192f2b47a6d8b85fed2c.zip | |
Try to lower memset/memcpy/memmove to vector instructions on ARM where the alignment permits.
llvm-svn: 143582
Diffstat (limited to 'llvm/test/CodeGen/ARM/2011-10-26-memset-with-neon.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/2011-10-26-memset-with-neon.ll | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/ARM/2011-10-26-memset-with-neon.ll b/llvm/test/CodeGen/ARM/2011-10-26-memset-with-neon.ll new file mode 100644 index 00000000000..3c9216cde7b --- /dev/null +++ b/llvm/test/CodeGen/ARM/2011-10-26-memset-with-neon.ll @@ -0,0 +1,20 @@ +; RUN: llc -march=arm -mcpu=cortex-a8 < %s | FileCheck %s + +; Should trigger a NEON store. +; CHECK: vstr.64 +define void @f_0_12(i8* nocapture %c) nounwind optsize { +entry: + call void @llvm.memset.p0i8.i64(i8* %c, i8 0, i64 12, i32 8, i1 false) + ret void +} + +; Trigger multiple NEON stores. +; CHECK: vstmia +; CHECK-NEXT: vstmia +define void @f_0_40(i8* nocapture %c) nounwind optsize { +entry: + call void @llvm.memset.p0i8.i64(i8* %c, i8 0, i64 40, i32 16, i1 false) + ret void +} + +declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind |
