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| author | Bob Wilson <bob.wilson@apple.com> | 2010-03-16 16:59:47 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-03-16 16:59:47 +0000 |
| commit | 1b4e8cc69c3dc617cc284e033d0668aeb411009f (patch) | |
| tree | fe2d8ee7e00ef0f6e3fbe2a14bcafbd8d887c11b /llvm/test/CodeGen/ARM/2009-10-30.ll | |
| parent | 35621a9dcce967eb02047ffc384b6e40d879ec33 (diff) | |
| download | bcm5719-llvm-1b4e8cc69c3dc617cc284e033d0668aeb411009f.tar.gz bcm5719-llvm-1b4e8cc69c3dc617cc284e033d0668aeb411009f.zip | |
--- Reverse-merging r98637 into '.':
U test/CodeGen/ARM/tls2.ll
U test/CodeGen/ARM/arm-negative-stride.ll
U test/CodeGen/ARM/2009-10-30.ll
U test/CodeGen/ARM/globals.ll
U test/CodeGen/ARM/str_pre-2.ll
U test/CodeGen/ARM/ldrd.ll
U test/CodeGen/ARM/2009-10-27-double-align.ll
U test/CodeGen/Thumb2/thumb2-strb.ll
U test/CodeGen/Thumb2/ldr-str-imm12.ll
U test/CodeGen/Thumb2/thumb2-strh.ll
U test/CodeGen/Thumb2/thumb2-ldr.ll
U test/CodeGen/Thumb2/thumb2-str_pre.ll
U test/CodeGen/Thumb2/thumb2-str.ll
U test/CodeGen/Thumb2/thumb2-ldrh.ll
U utils/TableGen/TableGen.cpp
U utils/TableGen/DisassemblerEmitter.cpp
D utils/TableGen/RISCDisassemblerEmitter.h
D utils/TableGen/RISCDisassemblerEmitter.cpp
U Makefile.rules
U lib/Target/ARM/ARMInstrNEON.td
U lib/Target/ARM/Makefile
U lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U lib/Target/ARM/AsmPrinter/ARMInstPrinter.h
D lib/Target/ARM/Disassembler
U lib/Target/ARM/ARMInstrFormats.td
U lib/Target/ARM/ARMAddressingModes.h
U lib/Target/ARM/Thumb2ITBlockPass.cpp
llvm-svn: 98640
Diffstat (limited to 'llvm/test/CodeGen/ARM/2009-10-30.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/2009-10-30.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/ARM/2009-10-30.ll b/llvm/test/CodeGen/ARM/2009-10-30.ll index 87d1a8b9e9a..90a5bd2a757 100644 --- a/llvm/test/CodeGen/ARM/2009-10-30.ll +++ b/llvm/test/CodeGen/ARM/2009-10-30.ll @@ -6,7 +6,7 @@ define void @f(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, ...) { entry: ;CHECK: sub sp, sp, #4 ;CHECK: add r{{[0-9]+}}, sp, #8 -;CHECK: str r{{[0-9]+}}, [sp], #4 +;CHECK: str r{{[0-9]+}}, [sp], #+4 ;CHECK: bx lr %ap = alloca i8*, align 4 %ap1 = bitcast i8** %ap to i8* |
