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| author | Saleem Abdulrasool <compnerd@compnerd.org> | 2016-12-27 18:35:19 +0000 |
|---|---|---|
| committer | Saleem Abdulrasool <compnerd@compnerd.org> | 2016-12-27 18:35:19 +0000 |
| commit | 0ce0dc250c330bd6b62bfa85fae22c9820e61567 (patch) | |
| tree | 9b76f9b9a36eb52f9c2b52c3cb0336996d20cfe6 /llvm/test/CodeGen/ARM/2009-08-26-ScalarToVector.ll | |
| parent | b222549dc551cd3a584a023e9250a3ce0d2b409f (diff) | |
| download | bcm5719-llvm-0ce0dc250c330bd6b62bfa85fae22c9820e61567.tar.gz bcm5719-llvm-0ce0dc250c330bd6b62bfa85fae22c9820e61567.zip | |
test: modernise ARM CodeGen tests
Replace the use of grep with FileCheck. Tidy up some of the tests. A
few of the tests have been left as weak as previously, though some have
been made more stringent.
llvm-svn: 290616
Diffstat (limited to 'llvm/test/CodeGen/ARM/2009-08-26-ScalarToVector.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/2009-08-26-ScalarToVector.ll | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/ARM/2009-08-26-ScalarToVector.ll b/llvm/test/CodeGen/ARM/2009-08-26-ScalarToVector.ll index 5407013f335..773f7c71e3b 100644 --- a/llvm/test/CodeGen/ARM/2009-08-26-ScalarToVector.ll +++ b/llvm/test/CodeGen/ARM/2009-08-26-ScalarToVector.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -mattr=+neon | not grep fldmfdd +; RUN: llc -mtriple thumbv7---elf -mattr=+neon -filetype asm -o - %s | FileCheck %s + target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32" target triple = "thumbv7-elf" @@ -12,16 +13,19 @@ declare <2 x i32> @llvm.arm.neon.vpadd.v2i32(<2 x i32>, <2 x i32>) nounwind read define void @_ZN6squish10ClusterFit9Compress3EPv(%quuz* %this, i8* %block) { entry: - %0 = lshr <4 x i32> zeroinitializer, <i32 31, i32 31, i32 31, i32 31> ; <<4 x i32>> [#uses=1] - %1 = shufflevector <4 x i32> %0, <4 x i32> undef, <2 x i32> <i32 2, i32 3> ; <<2 x i32>> [#uses=1] - %2 = call <2 x i32> @llvm.arm.neon.vpadd.v2i32(<2 x i32> undef, <2 x i32> %1) nounwind ; <<2 x i32>> [#uses=1] - %3 = extractelement <2 x i32> %2, i32 0 ; <i32> [#uses=1] - %not..i = icmp eq i32 %3, undef ; <i1> [#uses=1] + %0 = lshr <4 x i32> zeroinitializer, <i32 31, i32 31, i32 31, i32 31> + %1 = shufflevector <4 x i32> %0, <4 x i32> undef, <2 x i32> <i32 2, i32 3> + %2 = call <2 x i32> @llvm.arm.neon.vpadd.v2i32(<2 x i32> undef, <2 x i32> %1) nounwind + %3 = extractelement <2 x i32> %2, i32 0 + %not..i = icmp eq i32 %3, undef br i1 %not..i, label %return, label %bb221 -bb221: ; preds = %bb221, %entry +bb221: br label %bb221 -return: ; preds = %entry +return: ret void } + +; CHECK-NOT: fldmfdd + |
