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author | Reid Spencer <rspencer@reidspencer.com> | 2007-03-19 18:27:35 +0000 |
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committer | Reid Spencer <rspencer@reidspencer.com> | 2007-03-19 18:27:35 +0000 |
commit | 7953b683fc06d68a272984e521ade39e1a693b21 (patch) | |
tree | 789773446d93e7c3a30ea207eb673d09a226019d /llvm/test/CodeGen/ARM/2007-03-07-CombinerCrash.ll | |
parent | 9c62db7c8cb72791a890727bbf5e22666185317e (diff) | |
download | bcm5719-llvm-7953b683fc06d68a272984e521ade39e1a693b21.tar.gz bcm5719-llvm-7953b683fc06d68a272984e521ade39e1a693b21.zip |
For PR1258:
Revise numeric value references to accommodate collapsed type planes.
llvm-svn: 35170
Diffstat (limited to 'llvm/test/CodeGen/ARM/2007-03-07-CombinerCrash.ll')
-rw-r--r-- | llvm/test/CodeGen/ARM/2007-03-07-CombinerCrash.ll | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/llvm/test/CodeGen/ARM/2007-03-07-CombinerCrash.ll b/llvm/test/CodeGen/ARM/2007-03-07-CombinerCrash.ll index 649105a41a1..7317e62e318 100644 --- a/llvm/test/CodeGen/ARM/2007-03-07-CombinerCrash.ll +++ b/llvm/test/CodeGen/ARM/2007-03-07-CombinerCrash.ll @@ -3,19 +3,19 @@ define fastcc i8* @read_sleb128(i8* %p, i32* %val) { br label %bb -bb: - %p_addr.0 = getelementptr i8* %p, i32 0 - %tmp2 = load i8* %p_addr.0 - %tmp4.rec = add i32 0, 1 - %tmp4 = getelementptr i8* %p, i32 %tmp4.rec - %tmp56 = zext i8 %tmp2 to i32 - %tmp7 = and i32 %tmp56, 127 - %tmp9 = shl i32 %tmp7, 0 - %tmp11 = or i32 %tmp9, 0 - icmp slt i8 %tmp2, 0 - br i1 %0, label %bb, label %cond_next28 +bb: ; preds = %bb, %0 + %p_addr.0 = getelementptr i8* %p, i32 0 ; <i8*> [#uses=1] + %tmp2 = load i8* %p_addr.0 ; <i8> [#uses=2] + %tmp4.rec = add i32 0, 1 ; <i32> [#uses=1] + %tmp4 = getelementptr i8* %p, i32 %tmp4.rec ; <i8*> [#uses=1] + %tmp56 = zext i8 %tmp2 to i32 ; <i32> [#uses=1] + %tmp7 = and i32 %tmp56, 127 ; <i32> [#uses=1] + %tmp9 = shl i32 %tmp7, 0 ; <i32> [#uses=1] + %tmp11 = or i32 %tmp9, 0 ; <i32> [#uses=1] + icmp slt i8 %tmp2, 0 ; <i1>:1 [#uses=1] + br i1 %1, label %bb, label %cond_next28 -cond_next28: +cond_next28: ; preds = %bb store i32 %tmp11, i32* %val ret i8* %tmp4 } |