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| author | Tom Stellard <thomas.stellard@amd.com> | 2015-06-13 03:28:10 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2015-06-13 03:28:10 +0000 |
| commit | 45bb48ea197fe496865387120c7c55b56f0717d6 (patch) | |
| tree | 3914fb8c4ace9ea4dee024fc944d51dc45adf401 /llvm/test/CodeGen/AMDGPU/vtx-schedule.ll | |
| parent | 8fa9677d4eb1cd43973eb59acc12b0534691d604 (diff) | |
| download | bcm5719-llvm-45bb48ea197fe496865387120c7c55b56f0717d6.tar.gz bcm5719-llvm-45bb48ea197fe496865387120c7c55b56f0717d6.zip | |
R600 -> AMDGPU rename
llvm-svn: 239657
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/vtx-schedule.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/vtx-schedule.ll | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/vtx-schedule.ll b/llvm/test/CodeGen/AMDGPU/vtx-schedule.ll new file mode 100644 index 00000000000..912e258ebb8 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/vtx-schedule.ll @@ -0,0 +1,18 @@ +; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s + +; This test is for a scheduler bug where VTX_READ instructions that used +; the result of another VTX_READ instruction were being grouped in the +; same fetch clasue. + +; CHECK: {{^}}test: +; CHECK: Fetch clause +; CHECK: VTX_READ_32 [[IN0:T[0-9]+\.X]], [[IN0]], 0 +; CHECK: Fetch clause +; CHECK: VTX_READ_32 [[IN1:T[0-9]+\.X]], [[IN1]], 0 +define void @test(i32 addrspace(1)* nocapture %out, i32 addrspace(1)* addrspace(1)* nocapture %in0) { +entry: + %0 = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(1)* %in0 + %1 = load i32, i32 addrspace(1)* %0 + store i32 %1, i32 addrspace(1)* %out + ret void +} |
