[AMDGPU] Add an experimental buffer fat pointer address space.

Add an experimental buffer fat pointer address space that is currently
unhandled in the backend. This commit reserves address space 7 as a
non-integral pointer repsenting the 160-bit fat pointer (128-bit buffer
descriptor + 32-bit offset) that is heavily used in graphics workloads
using the AMDGPU backend.

Differential Revision: https://reviews.llvm.org/D58957

llvm-svn: 356373

1 files changed, 17 insertions, 0 deletions

diff --git a/llvm/test/CodeGen/AMDGPU/vectorize-buffer-fat-pointer.ll b/llvm/test/CodeGen/AMDGPU/vectorize-buffer-fat-pointer.ll
new file mode 100644
index 00000000000..7822b1da9f6
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/vectorize-buffer-fat-pointer.ll
@@ -0,0 +1,17 @@
+; RUN: opt -S -mtriple=amdgcn-- -load-store-vectorizer < %s | FileCheck -check-prefix=OPT %s
+
+; OPT-LABEL: @func(
+define void @func(i32 addrspace(7)* %out) {
+entry:
+  %a0 = getelementptr i32, i32 addrspace(7)* %out, i32 0
+  %a1 = getelementptr i32, i32 addrspace(7)* %out, i32 1
+  %a2 = getelementptr i32, i32 addrspace(7)* %out, i32 2
+  %a3 = getelementptr i32, i32 addrspace(7)* %out, i32 3
+
+; OPT: store <4 x i32> <i32 0, i32 1, i32 2, i32 3>, <4 x i32> addrspace(7)* %0, align 4
+  store i32 0, i32 addrspace(7)* %a0
+  store i32 1, i32 addrspace(7)* %a1
+  store i32 2, i32 addrspace(7)* %a2
+  store i32 3, i32 addrspace(7)* %a3
+  ret void
+}