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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-01-23 22:31:03 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-01-23 22:31:03 +0000 |
| commit | a6867fd441a14d9aa9a1a04085a7d0d5ec34d6eb (patch) | |
| tree | 108d7d49ad789acdc34b4cbb1072583140208240 /llvm/test/CodeGen/AMDGPU/v_mac.ll | |
| parent | f86d385813f9cd36bef50eeae7c58e7539a81e4d (diff) | |
| download | bcm5719-llvm-a6867fd441a14d9aa9a1a04085a7d0d5ec34d6eb.tar.gz bcm5719-llvm-a6867fd441a14d9aa9a1a04085a7d0d5ec34d6eb.zip | |
AMDGPU: Combine fp16/fp64 subtarget features
The same control register controls both, and are set to
the same defaults. Keep the old names around as aliases.
llvm-svn: 292837
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/v_mac.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/v_mac.ll | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/v_mac.ll b/llvm/test/CodeGen/AMDGPU/v_mac.ll index 16aed5928b0..4dc8d9608c1 100644 --- a/llvm/test/CodeGen/AMDGPU/v_mac.ll +++ b/llvm/test/CodeGen/AMDGPU/v_mac.ll @@ -1,5 +1,6 @@ ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=GCN %s -; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=GCN %s +; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-fp64-fp16-denormals -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=VI-FLUSH -check-prefix=GCN %s +; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+fp64-fp16-denormals -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=VI-DENORM -check-prefix=GCN %s ; GCN-LABEL: {{^}}mac_vvv: ; GCN: buffer_load_dword [[A:v[0-9]+]], off, s[{{[0-9]+:[0-9]+}}], 0{{$}} @@ -250,8 +251,8 @@ bb: ; FIXME: How is this not folded? ; SI: v_cvt_f32_f16_e32 v{{[0-9]+}}, 0x3c00 -; VI: v_add_f16_e32 [[TMP2:v[0-9]+]], [[A]], [[A]] -; VI: v_mad_f16 v{{[0-9]+}}, [[TMP2]], -4.0, 1.0 +; VI-FLUSH: v_add_f16_e32 [[TMP2:v[0-9]+]], [[A]], [[A]] +; VI-FLUSH: v_mad_f16 v{{[0-9]+}}, [[TMP2]], -4.0, 1.0 define void @fold_inline_imm_into_mac_src2_f16(half addrspace(1)* %out, half addrspace(1)* %a, half addrspace(1)* %b) #3 { bb: %tid = call i32 @llvm.amdgcn.workitem.id.x() |
