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authorTom Stellard <thomas.stellard@amd.com>2016-11-29 00:46:46 +0000
committerTom Stellard <thomas.stellard@amd.com>2016-11-29 00:46:46 +0000
commit0bc688116c95d74a1b72a650607eab1f8fdc2a33 (patch)
tree241502224e7feda1d8e6409af6202a7cd76884a4 /llvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll
parent3666e9c54b61a5b90387213d586c6a0751462178 (diff)
downloadbcm5719-llvm-0bc688116c95d74a1b72a650607eab1f8fdc2a33.tar.gz
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AMDGPU/SI: Avoid moving PHIs to VALU when phi values are defined in scalar branches
Reviewers: arsenm Subscribers: arsenm, llvm-commits, kzhuravl Differential Revision: https://reviews.llvm.org/D23417 llvm-svn: 288095
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll')
-rw-r--r--llvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll4
1 files changed, 1 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll b/llvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll
index b6ca95f8bfc..2c3a0981886 100644
--- a/llvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll
+++ b/llvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll
@@ -7,13 +7,11 @@
; CHECK: s_and_saveexec_b64
; CHECK-NEXT: s_xor_b64
; CHECK-NEXT: ; mask branch
-; CHECK-NEXT: s_cbranch_execz
; CHECK-NEXT: BB{{[0-9]+_[0-9]+}}: ; %loop_body.preheader
; CHECK: [[LOOP_BODY_LABEL:BB[0-9]+_[0-9]+]]:
-; CHECK: s_and_b64 vcc, exec, vcc
-; CHECK: s_cbranch_vccz [[LOOP_BODY_LABEL]]
+; CHECK: s_cbranch_scc0 [[LOOP_BODY_LABEL]]
; CHECK: s_endpgm
define amdgpu_ps void @test1(<8 x i32> inreg %rsrc, <2 x i32> %addr.base, i32 %y, i32 %p) {
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