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authorMatt Arsenault <Matthew.Arsenault@amd.com>2017-02-22 00:02:21 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2017-02-22 00:02:21 +0000
commit3ea06336fcf6c6b5643c36cdd51accb74ce642ed (patch)
treee8b8458bfd4b0e6bc98bc190c73a83e97e7363ad /llvm/test/CodeGen/AMDGPU/udiv.ll
parentb80bbca25400905e614b7cf8f8cf0525f184d362 (diff)
downloadbcm5719-llvm-3ea06336fcf6c6b5643c36cdd51accb74ce642ed.tar.gz
bcm5719-llvm-3ea06336fcf6c6b5643c36cdd51accb74ce642ed.zip
AMDGPU: Remove some uses of llvm.SI.export in tests
Merge some of the old, smaller tests into more complete versions. llvm-svn: 295792
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/udiv.ll')
-rw-r--r--llvm/test/CodeGen/AMDGPU/udiv.ll28
1 files changed, 25 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/udiv.ll b/llvm/test/CodeGen/AMDGPU/udiv.ll
index da88d2a8e8c..d081d5ef1ae 100644
--- a/llvm/test/CodeGen/AMDGPU/udiv.ll
+++ b/llvm/test/CodeGen/AMDGPU/udiv.ll
@@ -5,17 +5,19 @@
; FUNC-LABEL: {{^}}udiv_i32:
; EG-NOT: SETGE_INT
; EG: CF_END
+
+; SI: v_rcp_iflag_f32_e32
define void @udiv_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
%b_ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1
- %a = load i32, i32 addrspace(1) * %in
- %b = load i32, i32 addrspace(1) * %b_ptr
+ %a = load i32, i32 addrspace(1)* %in
+ %b = load i32, i32 addrspace(1)* %b_ptr
%result = udiv i32 %a, %b
store i32 %result, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: {{^}}s_udiv_i32:
-
+; SI: v_rcp_iflag_f32_e32
define void @s_udiv_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) {
%result = udiv i32 %a, %b
store i32 %result, i32 addrspace(1)* %out
@@ -30,6 +32,8 @@ define void @s_udiv_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) {
; FUNC-LABEL: {{^}}udiv_v2i32:
; EG: CF_END
+; SI: v_rcp_iflag_f32_e32
+; SI: v_rcp_iflag_f32_e32
; SI: s_endpgm
define void @udiv_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
%b_ptr = getelementptr <2 x i32>, <2 x i32> addrspace(1)* %in, i32 1
@@ -158,3 +162,21 @@ define void @scalarize_mulhu_4xi32(<4 x i32> addrspace(1)* nocapture readonly %i
store <4 x i32> %2, <4 x i32> addrspace(1)* %out, align 16
ret void
}
+
+; FUNC-LABEL: {{^}}test_udiv2:
+; SI: s_lshr_b32 s{{[0-9]}}, s{{[0-9]}}, 1
+define void @test_udiv2(i32 %p) {
+ %i = udiv i32 %p, 2
+ store volatile i32 %i, i32 addrspace(1)* undef
+ ret void
+}
+
+; FUNC-LABEL: {{^}}test_udiv_3_mulhu:
+; SI: v_mov_b32_e32 v{{[0-9]+}}, 0xaaaaaaab
+; SI: v_mul_hi_u32 v0, {{v[0-9]+}}, {{s[0-9]+}}
+; SI-NEXT: v_lshrrev_b32_e32 v0, 1, v0
+define void @test_udiv_3_mulhu(i32 %p) {
+ %i = udiv i32 %p, 3
+ store volatile i32 %i, i32 addrspace(1)* undef
+ ret void
+}
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