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| author | Yaxun Liu <Yaxun.Liu@amd.com> | 2017-11-10 02:03:28 +0000 |
|---|---|---|
| committer | Yaxun Liu <Yaxun.Liu@amd.com> | 2017-11-10 02:03:28 +0000 |
| commit | 35845f06a42847f6e08db3f877ca01873650ab92 (patch) | |
| tree | 82aff65558eb72524424d0f941a55cb51a52e913 /llvm/test/CodeGen/AMDGPU/trunc-vector-store-assertion-failure.ll | |
| parent | 920cc2f813c67e31fd3d2b2a92b81f037180243b (diff) | |
| download | bcm5719-llvm-35845f06a42847f6e08db3f877ca01873650ab92.tar.gz bcm5719-llvm-35845f06a42847f6e08db3f877ca01873650ab92.zip | |
[AMDGPU] Fix pointer info for lowering load/store for r600 for amdgiz environment
r600 uses dummy pointer info for lowering load/store. Since dummy pointer info
assumes address space 0, this causes isel failure when temporary load/store SDNodes
are generated for amdgiz environment.
Since the offest is not constant, FixedStack pseudo source value cannot be used
to create the pointer info. This patch creates pointer info using llvm undef value.
At least this provides correct address space so that isel can be done correctly.
Differential Revision: https://reviews.llvm.org/D39698
llvm-svn: 317862
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/trunc-vector-store-assertion-failure.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/trunc-vector-store-assertion-failure.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/trunc-vector-store-assertion-failure.ll b/llvm/test/CodeGen/AMDGPU/trunc-vector-store-assertion-failure.ll index 3dbc10d2e9b..d280be5eba4 100644 --- a/llvm/test/CodeGen/AMDGPU/trunc-vector-store-assertion-failure.ll +++ b/llvm/test/CodeGen/AMDGPU/trunc-vector-store-assertion-failure.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s +; RUN: llc < %s -march=r600 -mtriple=r600---amdgiz -mcpu=redwood | FileCheck %s ; This tests for a bug in the SelectionDAG where custom lowered truncated ; vector stores at the end of a basic block were not being added to the |
